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PSoC 5, 3 & 1 MCU

Contributor II

Does this device have input voltage ripple or spike regulations?

Ripple will occur up to 130mVp-p at 5V in low temperature conditions. LVD is set to 4.81V(Typ), but it has not been reset. (VM[2: 0] = 111b)

Thanks,
Tetsuo

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Moderator
Moderator

Hello Tetsuo-san,

This device does not have power supply voltage ripple specifications or power supply spike specifications. However, the power supply voltage on VDD must be maintained within the operating voltage range to ensure proper intended operation. The ranges are 4.75V to 5.25V and 3.00V to 3.60V.

Under the conditions that you have let us know, LVD does not trip, since the VDD has not gone below 4.81V. Assuming the nominal voltage of the power supply is 5V, a 130mVp-p ripple will cause VDD to drop to 5V - (130mV/2) ~= 4.935V, which is above the LVD threshold.

Do kindly refer to Power supply ripple effect on internal reference of PSoC 1 for some more information on the effects of ripple.

Best regards,

Sampath Selvaraj

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