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PSoC 5, 3 & 1 MCU

Anonymous
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        Hello together. Based on the IQ_DSS from User PSoC73 ( http://www.cypress.com/index.cfm?app=forum&id=2492&rID=88149 ) i realize a simple numerically controlled clock generator. You can use it to generate a variable frequency output from a fixed frequency input with an 24 bit phase accumulator. The average of the output pulses is near the desired output frequency. This could be helpful if you wish to generate e. g. a sinus sweep with the WaveDAC8-Component. But now i wish to trimm this output frequency with the USBFS "sof" signal to synchronize the output frequency with the USB host frequency. With this trimmed output frequency, i can trigger my Speaker-DAC-DMA's without any buffer over-/underflow, which occure when the USB host and -device clock are not synchronized. Thats my idea. What did you think. Could this idea work or did you see any pitfalls? Thanks in advance! PS: Yes, i've seen the AudioClkGen-Component to synchronize the clocks from USB host and -device. This solution modifies and trim the internal PSoC-PLL frequency, but i need a fixed PLL frequency. For AudioClkGen see: http://www.element14.com/community/thread/28830/l/psoc-4-pioneer-kit-community-project102-usb-audio-...   
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Anonymous
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        Hello together. Based on the IQ_DSS from User PSoC73 ( http://www.cypress.com/index.cfm?app=forum&id=2492&rID=88149 ) i realize a simple numerically controlled clock generator. You can use it to generate a variable frequency output from a fixed frequency input with an 24 bit phase accumulator. The average of the output pulses is near the desired output frequency. This could be helpful if you wish to generate e. g. a sinus sweep with the WaveDAC8-Component. But now i wish to trimm this output frequency with the USBFS "sof" signal to synchronize the output frequency with the USB host frequency. With this trimmed output frequency, i can trigger my Speaker-DAC-DMA's without any buffer over-/underflow, which occure when the USB host and -device clock are not synchronized. Thats my idea. What did you think. Could this idea work or did you see any pitfalls? Thanks in advance! PS: Yes, i've seen the AudioClkGen-Component to synchronize the clocks from USB host and -device. This solution modifies and trim the internal PSoC-PLL frequency, but i need a fixed PLL frequency. For AudioClkGen see: http://www.element14.com/community/thread/28830/l/psoc-4-pioneer-kit-community-project102-usb-audio-...   
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Anonymous
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Sorry but with IE-Browser, my post was not readeable. Therefore i repost my text now with Mozilla ...

   

Hello together.

Based on the IQ_DSS from User PSoC73 ( http://www.cypress.com/index.cfm?app=forum&id=2492&rID=88149 ) i realize a simple numerically controlled clock generator. You can use it to generate a variable frequency output from a fixed frequency input with an 24 bit phase accumulator. The average of the output pulses is near the desired output frequency. This could be helpful if you wish to generate e. g. a sinus sweep with the WaveDAC8-Component.

But now i wish to trimm this output frequency with the USBFS "sof" signal to synchronize the output frequency with the USB host frequency. With this trimmed output frequency, i can trigger my Speaker-DAC-DMA's without any buffer over-/underflow, which occure when the USB host and -device clock are not synchronized.
Thats my idea. What did you think. Could this idea work or did you see any pitfalls?

Thanks in advance!

PS: Yes, i've seen the AudioClkGen-Component to synchronize the clocks from USB host and -device. This solution modifies and trim the internal PSoC-PLL frequency, but i need a fixed "not trimmed" PLL frequency.
For AudioClkGen see: http://www.element14.com/community/thread/28830/l/psoc-4-pioneer-kit-community-project102-usb-audio-...

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