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PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

 It was clear from the I2C project that there are 2 options for the SDA and SCL lines. These are 1.0 and 1.1 or 1.5 and 1.7. But the 1.0 and 1.1 lines are also used for programming. For I2C communication, we need to have a pull-up on these pins, will this affect the programming in any way.

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AbhishekK_31
Employee

 Yes it will affect programming as ISSP lines does not require pull-ups. You can have a jumper to disconnect the pull-ups while programming or you can have the pull-up resistors on the I2C master device

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AbhishekK_31
Employee

 Yes it will affect programming as ISSP lines does not require pull-ups. You can have a jumper to disconnect the pull-ups while programming or you can have the pull-up resistors on the I2C master device

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Anonymous
Not applicable

A pull up resistor at P1[0] - SDA pin will cause programming issues. See below articles for the issue details and workaround-

   

http://www.cypress.com/?id=4&rID=37644

   

http://www.cypress.com/?rID=38364&cache=0

   

 

   

I would suggest for I2C-

   

1. Use P1[5]-P1[7]  or 

   

2. Use jumpers when using P1[0] and P1[1] 

   

 

   

-Rajiv Badiger

ETRO_SSN583
Esteemed Contributor

You can always do a bootloader over I2C -

   

 

   

http://www.cypress.com/?id=4&rID=60862

   

 

   

Regards, Dana.

ArvindK_86
Employee

As Rajiv suggested, the KB article "I2C pull up resistors during ISSP" will be helpful in this case. Apart from the points mentioned there, you can also try using internal pullup resistors on the I2C lines. This will require no need for hardware workaround or isolation during programming time. 

   

 

   

Another point to keep in mind are the Pin Loading Requirements (AN2014 - PSoC Programming). This is an important consideration, as the P1.0 and P1.1 actually serve three functions (GPIO/I2C, ISSP, XTAL).

   

 

   

Though the pullup value recommended is in the range of 2.2 k and 4 kohm, internal pullups of 5.6kohm might still work for your design.

   

 

   

 

   

References:

   

 

   

How to chage drivemodes of a GPIO - AN2094 - PSoC® 1 - Getting Started with GPIO

   

Pullup Resistors for I2C - AN50987 - Getting Started with I2C in PSoC® 1

   

Pin Loading for ISSP pins - AN2014 - PSoC® 1 Programming

ETRO_SSN583
Esteemed Contributor

One complicating issue is the 5.6K internal R's accuracy specs are from 4K

   

to 8K, nominal 5.6K. Depending on Buss C conditions You might evaluate your

   

design with external R's, at both extremes, to make sure reliability is met.

   

 

   

Regards, Dana.

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Anonymous
Not applicable

 Using Internal pull-up resistor seems to be a good option. 

   

Dana, do you feel that there could be issues because of the value of the internal pull-ups?

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ETRO_SSN583
Esteemed Contributor

All depends on end user applkication, and buss loading. So worst case

   

calculations must include the wide variation in pull up R.

   

 

   

Here is an example of an evaluation -

   

 

   

      http://dsscircuits.com/articles/effects-of-varying-i2c-pull-up-resistors.html

   

 

   

Specs (section in this on dealing with Buss C ) -

   

 

   

http://www.nxp.com/documents/user_manual/UM10204.pdf

   

 

   

Regards, Dana.

Anonymous
Not applicable

 Hi Dana,

   

Very nice article on Effects of varying I2C Pull-Up resistors. Thanks for the link.

   

Tanisha

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