How to trim the iDAC gain in the PSOC5LP?

[josc_1234441]

According to this article, High Resolution DAC in PSoC 3/5 , the DACx_TR register can be used for trimming the iDAC. How does trimming actually work? I can not find any documentation about trimming the gain of the iDAC.

[Vasanth]

Hi John,

Every DAC has DAC Trim Register (DACx_TR) which has an 8-bit value to increase or decrease the gain. This will be different for a given IDAC when it is operating in source or in sink mode.

Hence, the user should take care of this value when the IDAC direction mode is changed during run time.

A sample Calibration routine does the following:

The goal is to adjust the calibration code to get 256uA from the IDAC when the input code is 255 in the mid-range:

1. Fix the digital input code to 255 and the calibration code to 128 and capture the DAC output.
2. Determine the gain error.
3. Apply the correct calibration code and capture the DAC output.

I hope this gives you an idea.

Best Regards,
Vasanth

[josc_1234441]

Hi Vasanth,

Which is the calibration register? I can't find any information in the doc about this. In the header file, the following registers are defined:

#define IDAC1_LSD_CR0_REG         (* (reg8 *) IDAC1_LSD_viDAC8__CR0 )

#define IDAC1_LSD_CR0_PTR         (  (reg8 *) IDAC1_LSD_viDAC8__CR0 )

#define IDAC1_LSD_CR1_REG         (* (reg8 *) IDAC1_LSD_viDAC8__CR1 )

#define IDAC1_LSD_CR1_PTR         (  (reg8 *) IDAC1_LSD_viDAC8__CR1 )

#define IDAC1_LSD_Data_REG        (* (reg8 *) IDAC1_LSD_viDAC8__D )

#define IDAC1_LSD_Data_PTR        (  (reg8 *) IDAC1_LSD_viDAC8__D )

#define IDAC1_LSD_Strobe_REG      (* (reg8 *) IDAC1_LSD_viDAC8__STROBE )

#define IDAC1_LSD_Strobe_PTR      (  (reg8 *) IDAC1_LSD_viDAC8__STROBE )

#define IDAC1_LSD_SW0_REG         (* (reg8 *) IDAC1_LSD_viDAC8__SW0 )

#define IDAC1_LSD_SW0_PTR         (  (reg8 *) IDAC1_LSD_viDAC8__SW0 )

#define IDAC1_LSD_SW2_REG         (* (reg8 *) IDAC1_LSD_viDAC8__SW2 )

#define IDAC1_LSD_SW2_PTR         (  (reg8 *) IDAC1_LSD_viDAC8__SW2 )

#define IDAC1_LSD_SW3_REG         (* (reg8 *) IDAC1_LSD_viDAC8__SW3 )

#define IDAC1_LSD_SW3_PTR         (  (reg8 *) IDAC1_LSD_viDAC8__SW3 )

#define IDAC1_LSD_SW4_REG         (* (reg8 *) IDAC1_LSD_viDAC8__SW4 )

#define IDAC1_LSD_SW4_PTR         (  (reg8 *) IDAC1_LSD_viDAC8__SW4 )

#define IDAC1_LSD_TR_REG          (* (reg8 *) IDAC1_LSD_viDAC8__TR )

#define IDAC1_LSD_TR_PTR          (  (reg8 *) IDAC1_LSD_viDAC8__TR )

#define IDAC1_LSD_PWRMGR_REG      (* (reg8 *) IDAC1_LSD_viDAC8__PM_ACT_CFG )  /* Power manager */

#define IDAC1_LSD_PWRMGR_PTR      (  (reg8 *) IDAC1_LSD_viDAC8__PM_ACT_CFG )  /* Power manager */

#define IDAC1_LSD_STBY_PWRMGR_REG (* (reg8 *) IDAC1_LSD_viDAC8__PM_STBY_CFG )  /* Standby Power manager */

#define IDAC1_LSD_STBY_PWRMGR_PTR (  (reg8 *) IDAC1_LSD_viDAC8__PM_STBY_CFG )  /* Standby Power manager */

[josc_1234441]

I have tried the following, but it doesn't work:

CY_SET_REG8(IDAC1_LSD_TR, trim_val);

Where the register is:

#define IDAC1_LSD_TR          (* (reg8 *) IDAC1_LSD_viDAC8__TR )

[odissey1 · Accepted solution]

Try

CY_SET_REG8(IDAC1_LSD_TR_REG, trim_val)