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Hi
I encountered a problem while using AMUX to switch channel for 16 bit or higher resolution Delsig ADC.
I verify that in CY8CKIT-050 board and run the example project as below show, it can works as expected.
but when I change the ADC resolution to 16 bit, and input fixed voltage like half of power, the readout is abnormal of which jitter is serious, I think the Amux cause that, so I increase the delay time before start ADC to keep enough time after change channel, no matter what long I delay, the problem is still exist. I am confused about this problem.
I hope someone can help me solve this problem, thanks very much!
Best Regards,
Ekko
Solved! Go to Solution.
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PSOC5 LP MCU
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Ekko,
I've modified your project and simplified it to prove if the the Amux and ADC_DelSig is working at 16bit resolution.
I've attached my modified version of your project.
Here are a list of modifications:
- Disabled all DMA. The DMA could be a factor in the 'wonky' conversion issues.
- Disabled the DMA_done isr. This is because I disabled the DMA chain. I use the ADC_DelSig_IsEndConversion(ADC_DelSig_WAIT_FOR_RESULT).
- I synchronize which channel is being sampled by reading the LUT output through a contiguous port pin assignment.
- Added a UART Terminal debug output for the ADC counts and Converted mV for Vin0, Vin1, and Vin2 inputs. (115.2Kbps 8N1)
- Added a systick ISR to allow for debugging output every 1 second.
- Added 3 VDAC8s to generate static voltages from the CY8CKIT-059 board pins to be routed to the Vin0, Vin1 and Vin2 pins. This is used as input stimulus without external equipment.
- Changed the VDD values (VDDA, VDDD, VDDIOx etc) in the DWR/System tab to the measured value of 4.8V. I did this because you chose to use the vref to the ADC_DelSig to be VDDA/4. Therefore by setting the VDDA value in the DWR/System tab to a more accurate value, allows the ADC_DelSig_CountsTo_mVolts() to better compensate to a more accurate value. Note: As /odissey1 pointed out, if you use change the ADC Input range: to "Vssa to 1.25V" and the Reference: Internal 1.024V, this setting is not needed.
- Some pin assignments. Change if you need.
In the debug output to the terminal, I display Vin0, Vin1 and Vin2 values as ADC counts and converted mV values.
The results are very close to the expected values of Vin0 = 400mV, Vin1 = 100mV and Vin2 = 900mV.
Vin0 = 157C cnts Vin1 = 592 cnts Vin2 = 3152 cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 924mV
Vin0 = 1579 cnts Vin1 = 593 cnts Vin2 = 312F cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 922mV
Vin0 = 157B cnts Vin1 = 591 cnts Vin2 = 3108 cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 1578 cnts Vin1 = 592 cnts Vin2 = 310A cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 157A cnts Vin1 = 596 cnts Vin2 = 310C cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 1571 cnts Vin1 = 593 cnts Vin2 = 3111 cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 920mV
Vin0 = 1571 cnts Vin1 = 593 cnts Vin2 = 310B cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 156D cnts Vin1 = 593 cnts Vin2 = 3113 cnts Vin0 = 401mV Vin1 = 104mV Vin2 = 920mV
Vin0 = 1563 cnts Vin1 = 599 cnts Vin2 = 3106 cnts Vin0 = 401mV Vin1 = 104mV Vin2 = 919mV
Summary: In this modified project, I can say the ADC_DelSig with front-end AMUX is working.
Check your DMA.
I recommend simplifying the DMA chain first to replace the ADC_DelSig_IsEndConversion(ADC_DelSig_WAIT_FOR_RESULT) and move the results into the vin_adc array and use the debug terminal output as a verification of solid results.
"Engineering is an Art. The Art of Compromise."
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Elko,
If you are sampling Vdd/2, it is as noisy as the power supply. Did you try a battery or Vref 1.024V?
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Hi Odissey,
Thanks for your reply, I connect the AMUX channel 0 to potentiometer in board as below picture shown ,I tune the input voltage to VDD/2 or other fixed voltage.
I set ADC to 12 bit , the readout voltage is right, when I only change the resolution to 16 bit, the other configuration is keep default, the readout is abnormal which appear some fixed wrong value among them.
In addition, I remove the AMUX or set AMUX fixed to one channel, the readout value is good, I want to confirm that whether the AMUX don't support 16 bit or higher resolution ADC, or I miss something important operation for AMUX.
best regards,
Ekko
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Ekko,
When you say "set AMUX fixed to one channel" I assume the AMUX is present and the channel is not changing. If this is correct, then it is not an analog switch cross-talk issue.
I see you are manually changing the AMUX selection. How are you synchronizing the switching of the AMUX channel to the ADC conversion?
If there is a synchronization issue, you would see "cross-talk" between the previous or next channel and the desired channel you wish to sample. You could be sampling the tail-end of the previous channel or the front-end of the next channel in your reading.
"Engineering is an Art. The Art of Compromise."
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Elko,
I used Mux in 16-bit configuration w/o any problem before. I suspect some trivial issue. Can you post your project here?
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Hi Odissey,
I'm very grateful to you for helping me solve the problem, pls find the attachment.
In fact, I will adopt 3 channels 17 bit or higher resolution ADC to capture sensor anolog signal. Now I first must debug the 16 bit ADC to work good. My project is based on autority example project, I can't find what wrong cause that problem, pls help to comfirm it, thanks.
best regards,
Ekko
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Ekko,
I've downloaded your project. I needed to modify it a little (change the CPU to match the CY8CKIT-059, turn of XTAL, add some additional digital outputs for debugging.)
Here's my observations:
- The settling time for the AMuxHw_ADCP switching to the SOC is 372us. This is sufficient time.
- The SOC to EOC time is 200us.
- Vin0 and Vin2 are the only inputs being sampled start the DMA channel chain. Vin1 does not. Is this intended?
"Engineering is an Art. The Art of Compromise."
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Hi Len,
Thanks for your reply, pls see my answer below:
- Vin0 and Vin2 are the only inputs being sampled start the DMA channel chain. Vin1 does not. Is this intended?
- -> No, I will sample three Vin channels via AMUX, if one channel debugged well, I will create three same DMA chains of which each include two DMA components. In order to debug conveniently, I first create one DMA chain to debug any one of Vins .
Best regards,
Ekko
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Ekko,
If you're careful to make sure the DMA is synchronized to the channel being sampled, you can use one DMA channel to handle all three Vin inputs.
You just need to have a sample array of three elements. One for each Vin.
Just a thought.
"Engineering is an Art. The Art of Compromise."
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Hi len,
You are right, I will evaluate that method in my project. Now I need debug the AMUX work right. Pls help to find what wrong with AMUX, I am looking forward to your reply, thanks very much.
Best regards,
Ekko
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Ekko,
I've modified your project and simplified it to prove if the the Amux and ADC_DelSig is working at 16bit resolution.
I've attached my modified version of your project.
Here are a list of modifications:
- Disabled all DMA. The DMA could be a factor in the 'wonky' conversion issues.
- Disabled the DMA_done isr. This is because I disabled the DMA chain. I use the ADC_DelSig_IsEndConversion(ADC_DelSig_WAIT_FOR_RESULT).
- I synchronize which channel is being sampled by reading the LUT output through a contiguous port pin assignment.
- Added a UART Terminal debug output for the ADC counts and Converted mV for Vin0, Vin1, and Vin2 inputs. (115.2Kbps 8N1)
- Added a systick ISR to allow for debugging output every 1 second.
- Added 3 VDAC8s to generate static voltages from the CY8CKIT-059 board pins to be routed to the Vin0, Vin1 and Vin2 pins. This is used as input stimulus without external equipment.
- Changed the VDD values (VDDA, VDDD, VDDIOx etc) in the DWR/System tab to the measured value of 4.8V. I did this because you chose to use the vref to the ADC_DelSig to be VDDA/4. Therefore by setting the VDDA value in the DWR/System tab to a more accurate value, allows the ADC_DelSig_CountsTo_mVolts() to better compensate to a more accurate value. Note: As /odissey1 pointed out, if you use change the ADC Input range: to "Vssa to 1.25V" and the Reference: Internal 1.024V, this setting is not needed.
- Some pin assignments. Change if you need.
In the debug output to the terminal, I display Vin0, Vin1 and Vin2 values as ADC counts and converted mV values.
The results are very close to the expected values of Vin0 = 400mV, Vin1 = 100mV and Vin2 = 900mV.
Vin0 = 157C cnts Vin1 = 592 cnts Vin2 = 3152 cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 924mV
Vin0 = 1579 cnts Vin1 = 593 cnts Vin2 = 312F cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 922mV
Vin0 = 157B cnts Vin1 = 591 cnts Vin2 = 3108 cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 1578 cnts Vin1 = 592 cnts Vin2 = 310A cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 157A cnts Vin1 = 596 cnts Vin2 = 310C cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 1571 cnts Vin1 = 593 cnts Vin2 = 3111 cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 920mV
Vin0 = 1571 cnts Vin1 = 593 cnts Vin2 = 310B cnts Vin0 = 402mV Vin1 = 104mV Vin2 = 919mV
Vin0 = 156D cnts Vin1 = 593 cnts Vin2 = 3113 cnts Vin0 = 401mV Vin1 = 104mV Vin2 = 920mV
Vin0 = 1563 cnts Vin1 = 599 cnts Vin2 = 3106 cnts Vin0 = 401mV Vin1 = 104mV Vin2 = 919mV
Summary: In this modified project, I can say the ADC_DelSig with front-end AMUX is working.
Check your DMA.
I recommend simplifying the DMA chain first to replace the ADC_DelSig_IsEndConversion(ADC_DelSig_WAIT_FOR_RESULT) and move the results into the vin_adc array and use the debug terminal output as a verification of solid results.
"Engineering is an Art. The Art of Compromise."
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Hi, Len,
Thank you for what you have verification, you mean DMA cause the ADC readout wrong of which input through AMUX. I will use API function to get ADC value instead of DMA, I think that method will have no problem, next step I will verify that method and try to increase the sample rate.
Best regards,
Ekko
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Ekko,
Your AMUX with ADC logic appears to be good. The DMA may be introducing issues.
I love the DMA. It's a great resource. It's not always easy to setup.
Usually is DMA if there is data that is sampled very fast. Otherwise, an ISR should be sufficient.
"Engineering is an Art. The Art of Compromise."
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Hi Odissey,
I have been looking forward to your reply, pls kindly help to comfirm it if you have time, thanks and best regards.