Host programming on CY8C3246LTI-162

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Rusty
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When we made Port 1 Hi Z Analog, we can no longer program the PSoC3 with our host chip, but can still program with the MiniProg3.  Our host chip uses active drive up/down when writing and driving XRES, and a pullup with receiving.

We found the problem - in PSoC Creator 4.3, when we set the pin to Hi Z Analog, it of course made the all of Port 1 Hi Z Analog.   There was a side effect - in the Design Wide Resources > System section, it changed Programming\Debugging Debug Select to GPIO, which knocked out our ability to program from our host chip.  We then changed it back to SWD, we could then program from our host chip.

On a side note, even while  Programming\Debugging Debug Select was set to GPIO, the MiniProg3 could still program the chip - can you tell us how that can happen? 

We have a few boards at remote locations with out MiniProgs, and we'd like to be able to recover those chips with the host processor only.

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DheerajK_81
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First comment on KBA First comment on blog 5 questions asked

Hello @Rusty ,

If the debug port is disabled, the only way to gain debug access to the part is to enter a valid port acquire key within a key window period of 8 µs after reset (8 µs is only the initial window, it extends to 400 µs if eight clocks are sampled in 8 µs). The port acquire key must be transmitted over one of the two SWD pin pairs, as indicated in the following table.

DheerajK_81_0-1621261674566.png

Please refer the Section 38.6 Test Controller Acquisition in the Architecture TRM for more information. This acquisition sequence is only needed when the Debug Select is set to GPIO. After this is complete, the host can
then either continue using the SWD interface or switch to the JTAG interface. See PSoC 3 Device Programming
Specifications for detailed timing diagrams on the test controller acquisition. 

Your host chip is probably not following this acquisition sequence and hence not able to program the target device. Since Miniprog3 follows this, it is able to program even if the Debug Select is set to GPIO. 

Hope this helps 🙂

Regards,
Dheeraj

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2 Replies
DheerajK_81
Moderator
Moderator
Moderator
First comment on KBA First comment on blog 5 questions asked

Hello @Rusty ,

If the debug port is disabled, the only way to gain debug access to the part is to enter a valid port acquire key within a key window period of 8 µs after reset (8 µs is only the initial window, it extends to 400 µs if eight clocks are sampled in 8 µs). The port acquire key must be transmitted over one of the two SWD pin pairs, as indicated in the following table.

DheerajK_81_0-1621261674566.png

Please refer the Section 38.6 Test Controller Acquisition in the Architecture TRM for more information. This acquisition sequence is only needed when the Debug Select is set to GPIO. After this is complete, the host can
then either continue using the SWD interface or switch to the JTAG interface. See PSoC 3 Device Programming
Specifications for detailed timing diagrams on the test controller acquisition. 

Your host chip is probably not following this acquisition sequence and hence not able to program the target device. Since Miniprog3 follows this, it is able to program even if the Debug Select is set to GPIO. 

Hope this helps 🙂

Regards,
Dheeraj

Rusty
Level 3
Level 3
25 sign-ins 10 replies posted 10 questions asked

Thanks

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