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PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

We are using cy8c22545.

   

When trying to use our board with a 32.768 kHz watch. ( 12 cap sense keys toggle operation)

   

The key sensing hangs up meaning some keys will be detected and other will notm Some keys stay continuously ON (detected). This happens when we touch different parts of the board including crystal etc and tracks. Agreed this is not how it should be operated  but Same code running on internal osc works fine.

   

Also when the capsense  keys are not beings sensed key operations using our remote work fine .

   

Meaning the main loop is running fine  and only the cap sense part of the code of the keys goes for a toss.

   

We have tried the usual App note AN2027 for ECO and the technical ref manual but cannot find any thing to resolve our issue.

   

we need to use the crystal so we need a solid  solution to get stable operation using the crystal

   

Another thing suggested in AN2027 is setting ECO_TR to  a few values but somewhere in the Technical manual it says not to touch this register.

   

Again no clear direction on the crystals oscillator. Looking at the lst files cannot see the ECO_TR  ( not even initialized)

   

Part of the code pasted below simple button functionality

   

main()

   

{

   

// other initializations

   

SmartSense2X_EMC_1_Start();
    SmartSense2X_EMC_1_InitializeBaselines();
     
   
    while (1)
    {
        SmartSense2X_EMC_1_ScanAllSensors();
        SmartSense2X_EMC_1_UpdateAllBaselines();
        
        
        /*Button1 */
        if(SmartSense2X_EMC_1_bIsSensorActive(BUTTON1))
        {
            if ((button_prior_state & BUTTON1_MASK) == 0)
            {
                
                toggle_LOAD1();

   

            }
            button_prior_state |= BUTTON1_MASK;
        }
        
        else
        {
            button_prior_state &= (unsigned int )~BUTTON1_MASK;
        }

   

}

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Anonymous
Not applicable

Anybody??

   

No body??

   

Have discussed issue with Cypress guys. No avail.

   

Anybody with any pointers??

   

The instability is slightly better when PLL is disabled. meaning more unstable operation with PLL enabled along with using external crystal.

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