I've been trying to get started with the Sparkfun FreeSoc2 PSoC 5LP Dev Board, but PSoC Creator returns this error when I try to run "Generate Application" in the Build Menu:
plm.M0046:"C:\Program Files\Cypress\PSoC Creator\3.3\PSoC Creator\bin/sjplacer.exe" failed (0xC0000139)
details from error:
The placer is not able to place all of the carry chains without backtracking. It fills one UDB bank to 15/16 and the other to 7/8 and cannot place the final 2-datapath chain. As a workaround, add a control file to the TopDesign component (in Workspace Explorer's Components tab) with the following lines: ATTRIBUTE placement_force OF \Timer_ADPActiveTime:TimerUDB:sT16:timerdp:u0\ : LABEL IS "U(2,0)"; ATTRIBUTE placement_force OF \Timer_OutputPeriod:TimerUDB:sT24:timerdp:u0\ : LABEL IS "U(3,1)"; ATTRIBUTE placement_force OF \Timer_OutputActiveTime:TimerUDB:sT24:timerdp:u0\ : LABEL IS "U(0,1)"; This will fill the datapaths in the second UDB bank and allow the placer to assign the remaining datapaths.
I've received this error for both a completely empty project and one that configures a digital input for a button and a digital output for an LED, going by this tutorial: https://learn.sparkfun.com/tutorials/freesoc2-introduction
Any help is greatly appreciated!
Solved! Go to Solution.
Welcome in the forum!
I just downloaded your test2 and successfully build both projects within the workspace.
So I would at first suggest to de-install Creator and try to re-install from Cypress website.
Thanks for the response Bob!
Unfortunately, downloading Creator (v3.3) again, uninstalling all the applications (to the best of my knowledge), and reinstalling the entire package had no effect on trying to generate the application for an empty project.
Note that I am running Windows XP 32-Bit as a virtual machine with VMWare Fusion (v3.0.1); I understand that running in a VM is not technically supported, but I know there's other reports of it working. Every other part of the application I've tried has worked.
When I googled for any creator errors involving "sjplacer.exe", I received maybe 3 results in total, none of which were applicable.
run sjplacer.exe manually
"The procedure entry point GetLogicalProcessorInformation could not be located in the dynamic link library KERNL32.dll"
quick google for GetLogicalProcessorInformation, reference to XP 32-bit SP3
Control Panel > System, only have SP2
Install SP3, restart.
Generate application works. And the sad thing is, I had read the release notes and knew to check for SP3, but hadn't. : (
Anyway, thanks for the suggestions Bob.
I am working with a PSoC5 in a FSK-MSK demodulator radio project and get the same error when try to compile it "The placer is not able to place all of the carry chains without backtracking..." the resource meter shows me like everything is ok. I think the problem is routing the design that is a little bit dense. Can you help me checking the design?
Set the UARTs to "Full UART (Rx + Tx)", (Don't ask why, but it works)
Additionally I would suggest to update all the project's components to latest, your ADC is very old.
Following with the same project now I have a new problem, I have to use a USBCOM port but when I try to add the component to the top design the compiler shows me this errors:
Error: apr.M0036: IO "ETHWI_READY(0)" cannot be placed into "P15" because the VTrip value does not match that of other IOs in the port. Pick a different place for this IO. (App=cydsfit)
Error: apr.M0036: IO "\USBUART:Dp(0)\" cannot be placed into "P15" because the VTrip value does not match that of other IOs in the port. Pick a different place for this IO. (App=cydsfit)
If the USBUART has fixed pins how can I change the position, I have the PCB board designed already, do you know a way to fix this error without change the pins positions??. the project is attached to the message.
Thanks in advance.
Works perfect, thanks again!, sometimes feel myself a PSoC beginner... if you come to Colombia I'll pay the beer.
For reference: I have seen same error message: "... because the VTrip value does not match that of other IOs in the port..." and my issue was that one high impedance digital input pin of the port was configured Threshold = CMOS and other input pin on the same port was configured Threshold to be LVTTL. Making them both LVTTL solved the issue.