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PSoC 5, 3 & 1 MCU

JaWe_293101
New Contributor II

I am trying to implement the example filter code for the cy8ckit-059,  according to this video:  http://www.cypress.com/video-library/PSoC/how-create-analog-filter-psoc-5lp/385626

Everything seems fine- all components updated, no errors,  but no signal output of the VDAC.  There is something wrong with the DMA implementation I think.  The circuit looks like below.  Attached is the workspace bundle.  

I also tried to probe the eoc output of the ADC,  but there's no signal.  Is it because this is meant only for DMA ?  

Thanks in advance!

Filter_problem.JPG

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1 Solution
odissey1
Honored Contributor II

James,

One way to circumvent signed/unsigned issue with Filter-DMA-VDAC8 is to use extra logic in between, see for example this thread and example project in #7:

Class D adcDelSig>Filter>Pwm using DMA only

I will take a look again, maybe there is some other trick to directly DMA that I missed.

/odissey1

View solution in original post

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10 Replies
Vasanth
Moderator
Moderator

Hello James,

In CY8CKIT-059 has bypass capacitors connected to pins P0[2],P0[3],P0[4] and P3[6]. This should be the reason for the project not working at your end. Could you please try changing the pins you have used and check whether the project is working?

Best Regards,
Vasanth

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JaWe_293101
New Contributor II

Thanks Vasanth,   I changed the pins as below,  this time I get an output,  but is it not sinusoidal,  more like clipping rail to rail with even a tiny AC signal input.  It does change as I change the frequency though.   The input signal is centered nicely about 2.5V and it is not going over 5 or less than 0.  Tried buffering the VDAC but no change.  Any other thoughts?

FIR problem.jpg

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Vasanth
Moderator
Moderator

Hi James,

Could you please give more details ? What is the variation you are observing with frequency? What is the nature of your load ? Is it similar to which is specified in the project ?

Best Regards,
Vasanth

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JaWe_293101
New Contributor II

All is identical to the original project but I added an output buffer.   You can see what is happening in the picture below.

The input signal is the input to the A/D, floating nicely at Vdd/2.

If it weren't for the jump when the sinusoidal part of the output signal changes its "sign",  then this is working fine.   As frequency increases,  the "sinsusoidal" part of the output waveform decreases amplitude and after the 6kHz cutoff frequency there's no more sinusoid - Just a DC output.

I think something is wrong with how data is being fed into the VDAC (settings as shown below).

Sample rate is the same for both the A/D and the filter (48ksps).

FIR problem.jpg

pastedImage_1.png

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odissey1
Honored Contributor II

The signal observed (yellow trace) is signed output from the Filter. The VDAC8 needs uint8 type to show correct sine.

/odissey1

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JaWe_293101
New Contributor II

That makes sense, but I followed the video exactly (link above).  Todd Dust did not do any further conversion.  In fact the original ISR routine from the example project, which converted the filter output to unsigned, was removed in the modified DMA approach.    Here's the code that is writing to the VDAC from the DMA:

pastedImage_0.png

So how to you convert this into the uint8 that the VDAC needs?  And how did it work without doing so in the video?

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Vasanth
Moderator
Moderator

Hello James,

In the video the input is given does not go below 2.5V. For such a waveform this distortion might not happen. May be this was not clearly defined in the video. For complete range of the input we may have to make sure that the input written into the DAC is proper which requires CPU intervention(DMA might not be sufficient). In an ISR we can add the necessary offset to get the right result. Please see Filter_ADC_VDAC example in PSoC Creator, Code examples section.

Best Regards,
Vasanth

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odissey1
Honored Contributor II

Vasanth,

According to schematic, the input is AC coupled, which automatically centers it around 2.5V. I don't recollect Todd Dust switching the wires during the demo.

/odissey1

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odissey1
Honored Contributor II

James,

One way to circumvent signed/unsigned issue with Filter-DMA-VDAC8 is to use extra logic in between, see for example this thread and example project in #7:

Class D adcDelSig>Filter>Pwm using DMA only

I will take a look again, maybe there is some other trick to directly DMA that I missed.

/odissey1

View solution in original post

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JaWe_293101
New Contributor II

That thread has some interesting solutions.   Thanks for that.    I think I'll stick with the ISR approach,  seems simpler so I'll  trade that for increased current.

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