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PSoC 5, 3 & 1 MCU

Anonymous
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        Hello, Just went through the blog written by Bradley Budlong. I would recommend you to go through it. http://www.cypress.com/?rID=46730. FIFO to capture 8 / 16 bit data parallely and buffer to a depth of level 4. This component can be used to capture fast switching parallel data. The library file given in the blog has to be modified a bit for PSoC 5LP. I am attaching the modified file with a example project with this post. I am also attaching the document which will assist you if you face any error while linking the library files. Keerthi   
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Anonymous
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Anonymous
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Hi,

   

Thanks for the post regarding the  FIFO.

   

I have downloaded the zip file & have gone through the FIFO.v file.

   

Then I found the following

   

1. Out of the F0 & F1 fifos your are using only F0.

   

2. The depth of the FIFO to be 4 words only.

   

I want to know is there any other way to increase the depth of the FIFO to 512/1024 X16?

   

Thanks & Regards

   

N.Sarvani

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Honored Contributor II

I believe that using FIFOIn, the max depth is 4x16. I never seen any solution for deeper buffer length using UDB.  

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