External ADC

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stsm_296211
Level 2
Level 2
10 replies posted 5 replies posted 5 questions asked

Are there any appnotes or example projects supporting an external ADC, parallel interface via DMA? I can't seem to find anything. I see a parallel-to-serial example in the AN84810 which is helpful, but was hoping for a bit more specific.

   

Thanks for any tips -Steve

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ETRO_SSN583
Level 9
Level 9
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I am not aware of any, maybe take a look here -

   

 

   

http://www.cypress.com/documentation/code-examples/psoc-345-code-examples

   

 

   

Creator has examples of A/D and DMA use, and the ap notes on DMA and EMIF

   

component might be of help -

   

 

   

http://www.cypress.com/documentation/application-notes/an52705-psoc-3-and-psoc-5lp-getting-started-d...                                             AN52705     Getting Started with DMA

   

http://www.cypress.com/documentation/application-notes/an84810-psoc-3-and-psoc-5lp-advanced-dma-topi...                          AN84810     PSoC® 3 and PSoC 5LP Advanced DMA Topics

   

http://www.cypress.com/documentation/application-notes/an61102-psoc-3-and-psoc-5lp-adc-data-bufferin...                AN61102 PSoC® 3 and PSoC 5LP - ADC Data Buffering Using DMA

   

http://video.cypress.com/video-library/search/dma/     Videos on DMA

   

https://www.youtube.com/results?search_query=dma+psoc Videos on DMA (some overlap)

   

 

   

Regards, Dana.

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That's what I found too, yell if you hear of anything more specific. The par/ser example in an84810 should get me started.

   

Thanks Dana.

   

 

   

Steve

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ETRO_SSN583
Level 9
Level 9
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You are welcome.

   

 

   

Dana.

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ulcl_3692601
Level 1
Level 1
Were you able to solve it?

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ulcl,

This is very old thread. It doesn't show in the forum "resent" list, and not many people can see it.

It would be better to start a new thread and give more details such as what ADC part number and what happens to the data received.

In short:

Interfacing external ADC bus is possible several ways, one is using FIFOin component by B. Budlong, see example here:

Re: Difficulties using the parallel input bus (PI) in UDBs

CReg_FIFO_RAM_01a_scm.png

And similar example, but using internal ADC with bus output and FIFIOin.

Best Approach: Implement DMA on 16bit Timer or 2 Status Registers?

ADC_LPF_FIFO_03_A.png

The ADC_SAR_ex and LPFilter above are just for demo purposes. With external ADC the 8-bit FIFOin buses d_lsb and d_msb should be connected to the 8-bit input ports for reading ADC data.

In both cases, the limitation is 16-bit bus width and DMA speed (~5-7MHz @ 80 MHz BUS_CLK)

/odissey1

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