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I designed a PSoC3 device control board and implemented several copies with CY8C3866AXI-040ES2 parts. One unit is intended to connect to a host via USB. Extra units are daisy chained via CAN BUS connectors from the hosted unit.
The design requires an accurate MASTER_CLK and BUS_CLK. This accuracy was intended to be derived from an external MHz crystal oscillator, which had been configured to drive the IMO in the PSoC3.
After debugging several boards, I determined that the CAN BUS had an extremely high error rate for any board which had not been connected to USB since power up. Investigating, I found errata and blog/forum items which report problems with MHz external oscillator (ECO) startup on ES2 parts.
Not good for me.
Momentary contact with a USB host somehow assisted the startup, so it took a while to determine that the ECO was not always starting. It could start, so it worked, but did not reliably do so on its own.
Once I read the errata and other blog messages, I cooked up the following work around:
(1) Configure the IMO to run from the on-chip oscillator. This is too innacurate for CAN, but starts the PSoC chip. The XTAL clock is not connected to the clock tree, but is still accessable.
(2) Add two System Clock components, each 25 kHz frequency clocks. One (XTAL_MON) driven from the 24MHz external oscillator, the other (MCLK_MON) driven from the system 48 MHz MASTER_CLK bus.
(3) Add a 2-bit status register (Status_Reg_ClkMon), clocked by 48MHz BUS_CLK to sample the two 25 KHz clocks. Firmware can sample the 25 kHz clock fast enough to not miss edges.
(4) Let the auto generated ClockSetup() function run normally. It will fail to start the ECO, but we are not using it yet.
(5) Until the ECO starts, periodically (at 100 millisecond intervals), pause to count clock edges of the slow derived 25 kHz clocks using Status_Reg_ClkMon. Stop when the MCLK_MON clock generates 100 edges. You better be getting counts from MCLK_MON, or your code is not even executing. This should take about 2 milliseconds. Check to see if both counts match to some tolerance (like 5 percent), that is, if the count from XTAL_MON is between 95 and 105. If so, declare the crystal started.
(6) Switch the system clock tree to the external ECO, with statements from ClockSetup() which are removed as a result of the configuration change in (1).
// reconfigure the IMO to use the XTAL as the source CY_SET_REG8((void xdata *)(CYDEV_CLKDIST_CR), 0x40); CY_SET_REG8((void xdata *)(CYDEV_FASTCLK_IMO_CR), 0x70); CY_SET_REG8((void xdata *)(CYDEV_CLKDIST_CR), 0x40);