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Hi,
Is it possible to compare A0 and A0 accumulators in data path? Confusing or contradictory statements in verilog file (component author guide, page 62), where the output showing as result of A0or A1 comparing with D0/D1,
cy_psoc3_dp DatapathName(
/* output */ .ce1(), // Accumulator [0|1] = Data register 1
/* output */ .cl1(), // Accumulator [0|1] < Data register 1
Whereas datapath configuration tool cheat sheet showing following options
A1_D1: A1 < D1, A1 == D1
A1_A0: A1 < A0, A1 == A0
A0_D1: A0 < D1, A0 == D1
A0_A0: A0 < A0 , A0 == A0
What is CMP SELA and CMP SELB? Are they two compactors or two inputs (A and B) to a single compactor?
My goal to compare A0 and A1.
Thanking You,
Ras
Solved! Go to Solution.
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Okay, you've asked two different questions, while I assume one was a typo, the answer to both is yes.
Question 1: can I compare A0 and A0? Yes you can. The compare is not super useful, but if you send A0 and A0 into the ALU you can subtract and get 0 to store into A0 or A1 (saving D0/D1 for more interesting values).
Question 2: can I compare A0 and A1? Yes you can. Look at http://www.cypress.com/file/41531/download page 5, you'll see you have CMP0 and CMP1. (Compare 0 and compare 1). CMP0 only works on A0 and D0. CMP1 is programmable, but you'll notice you can only put in A1 on the left side. That means the compare values will be A1<A0 and A1==A0 for cl1 and ce1 respectively.
Now here's the cool thing, you can change the comparison on a per instruction basis, which is why you have both CMP SEL A and CMP SEL B. So if you set CMP SELA to A1_A0, and you want the outputs from ce1 and cl1 to be the comparison between A1 and A0, then you should use CFGA in the CMPSEL of your instruction.
Or as a picture:
The instructions in red (4-7) use the configuration in red (CMPB) where as the instructions in yellow (0-3) use the configuration in yellow (CMPA). Obviously you'll need to change the configuration to meet your needs.
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Okay, you've asked two different questions, while I assume one was a typo, the answer to both is yes.
Question 1: can I compare A0 and A0? Yes you can. The compare is not super useful, but if you send A0 and A0 into the ALU you can subtract and get 0 to store into A0 or A1 (saving D0/D1 for more interesting values).
Question 2: can I compare A0 and A1? Yes you can. Look at http://www.cypress.com/file/41531/download page 5, you'll see you have CMP0 and CMP1. (Compare 0 and compare 1). CMP0 only works on A0 and D0. CMP1 is programmable, but you'll notice you can only put in A1 on the left side. That means the compare values will be A1<A0 and A1==A0 for cl1 and ce1 respectively.
Now here's the cool thing, you can change the comparison on a per instruction basis, which is why you have both CMP SEL A and CMP SEL B. So if you set CMP SELA to A1_A0, and you want the outputs from ce1 and cl1 to be the comparison between A1 and A0, then you should use CFGA in the CMPSEL of your instruction.
Or as a picture:
The instructions in red (4-7) use the configuration in red (CMPB) where as the instructions in yellow (0-3) use the configuration in yellow (CMPA). Obviously you'll need to change the configuration to meet your needs.