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i need one basic Band pass filter design code. .. i am not able develop the code for BPF . i already checked all vedio which is not explaning everything about Filter design coding ...
Solved! Go to Solution.
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PSoC 1
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You used the wizard ? First you place the filter then right click it
and choose Wizard and configure it.
http://www.cypress.com/?rID=2880 AN2168 - PSoC® 1 - Understanding Switched Capacitor Filters
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can i connect BPF input to port pin ... suppose if i connected directely then what should be the mode of input pin .......high Z analog or some thing else .......
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Yes, and it would be high Z analog. Remember the Vin to a pin must
meet Vdd >= Vin >= Vss.
Methods to offset input -
www.dropbox.com/s/k1yn4m7heaixvmg/ADinput%20negative%20inputs.zip
Regards, Dana.
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Also in your global resources set your analog power settings
to high to get common mode range high and bandwidth for
the OpAmps used max (depends on what freq you are dealing
with).
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Something like this -
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still getting these error ......
CODE-
{
VLT_CR = 0x00;
PGA_Start(3);
PGA_SetPower(3);
PGA_SetGain(PGA_1_G4_00);
}
--------------------------------------------------------------------------------------------------------------------------------------------------------------------------
Processing top level rules...
Level 5 Warning - Configuration pdproject2, User Module PGA_1: Gain value has not been initialized.
Level 5 Warning - Configuration pdproject2, User Module PGA_1: AnalogBus value has not been initialized.
Processing base device rules...
Base Device CY8C28445-24PVXI:
Level 1 Warning - pdproject2: Currently POR voltage is set to 2.9 Volts. To change the POR Voltage the VLT_CR should be modified in main code.
Processing part rules...
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Click once on component in route view.
Then set, in its properties view, all the parameters. Those are used
on startup and if not set will give you a warning.
Set the POR to some reasonable value in top left properties window, say
4.5 V, or there abouts, if you are running 5V Vdd.
Regards, Dana.
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Still Level 1 warning is coming ....
and no out ......... 😞
Level 1 Warning - pdproject2: Currently POR voltage is set to 2.9 Volts. To change the POR Voltage the VLT_CR should be modified in main code.
Processing part rules...
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Post your project and a schematic -
“File” Designer
“Archive Project”
Regards, Dana.
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You cannot do anything about this warning, there is no way to make it disappear.
It is informative only
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Still post your project, see if we can fix the filter problem.
I posted a CASE to see if this warning can be fixed in a future release of Designer.
Regards, Dana.
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I am giving u all information step by step what i did ... if u find anything wrong plzz inform me ... i'm waiting for ur response
1-i am Using CY8C28445-24PVXI
2-I am giving power through MiniProg 3 ... and my LED program working
3-Port0_1 is I/p P0_3 is O/p
4-plz find Global Resources jpg
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Posting the actual project makes it a lot easier to examine the whole picture/configuration.
“File” Designer
“Archive Project”
Regards, Dana.
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#include <m8c.h> // part specific constants and macros
#include "PSoCAPI.h" // PSoC API definitions for all User Modules
//#include "pga_1.h"
void main(void)
{
VLT_CR = 0xA0;
PGA_1_Start(PGA_1_HIGHPOWER);
PGA_1_SetPower(3);
BPF2_4_Start(BPF2_4_HIGHPOWER)
PRT0DR ^=0x80;
while(1);
}
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The project archive makes it so much easier.
But your BPF column clock has to be 188 Khz, you have it set to VC1,
1 Mhz. So use VC2, VC3 to generate the column clock with
appropritate dividers set in global resources window. The 188 Khz does
not have to be exact, and you can test out any differences in the wizard
for the oversampling freq clock you do choose for the BPF.
Or use a timer to gen the column clock.
You also have the G for the BPF set at + 10 db, is that what you want ?
Or set it at 0 db, G = 1, and use the PGA to gain up the signal if needed.
Regards, Dana.
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You set the filter up for 10 Khz, but feed it 1 Khz, so filter
is working great, its rejecting signals outside its passband.
I assume your sine in has a DC offset, that it never goes < Vss ?
Regards, Dana.
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Hi Do you know really what is going on.... it was past pic That value i already changed and config for 1000Hz... .............
and one more thing i am passing one by one 20Hz to 20000Hz signal still didn't get any output ... last time i connected PGA directly to check it is amplifing or not but still no signal comming at output .........
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Please please please post an archive of your project -
“File” menu Designer
“Archive Project”
What board are you using ?
Regards, Dana.
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By the way, when you do port R/W operations, if they are Read-Modify-Write,
you need to use shadow registers.
http://www.cypress.com/?rID=2900 AN2094 - PSoC® 1 - Getting Started with GPIO
https://www.youtube.com/watch?v=tei6q5M3C0g Shadow Registers
http://www.cypress.com/?rID=39497 Shadow Registers
Regards, Dana.
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Hi Dana really i want to appreciate your work .. but what should i do if m not able to pass out any signal from PSoc IC ...
Only i just want to know a how to design Basic Band Pass filter for 10KHz in Psoc1 CY8C28445 ....
i already done by MCP6004 IC ... but i want to optimize the size of device by using PSOC ...
i need only working example of 10000 Hz BPF for starting or anyone
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Post an archive of your project.
Regards, Dana.
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What you posted here are the specifications you got to build your project. Helpful but not what Dana was asking for.
Start Designer and open your project
Under the "File" menu you find "Archive Project" which will create a compressed file with all the informations.
Attach that .zip-file to your next post.
Bob
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For this design column clcok, from wizard, has to be 100 Khz.
You are taking it from VC2, so it needs to be 20, you currently have
it set to 2.
In global resources you have OpAmp bias set to low, set it to high.
Set P0_3 to input to PGA -
You had it set to std cpu.
Regards, Dana.
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You have PGA gain in its properties window set to 1.77,
is that intended, or do you just one a G = 1 ? If so change
its properties.
Lastly you set your filter as a LPF, I thought you had wanted BPF ?
Regards, Dana.
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