cancel
Showing results for 
Search instead for 
Did you mean: 

PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

Hello,

   

     I gave an analog signal to ADC (input voltage=1.5v), i am taking the output from VDAC using DMA, here the output signal is getting amplified. may i know why the input signal is amplified ?

   

The configuration and Schematic diagram  which i kept  is shown in pic.

   

Here if i keep input  offset=0 i am getting distorted output,what should i do to avoid this?

0 Likes
Reply
3 Replies
Esteemed Contributor

Your input signal must be in the CM range of the ADC. So if offset = 0 your

   

input is swinging below Vssa, which is not allowed. You can offset by a R

   

divider on ADC input biasing it to Vref, and AC coupling.

   

http://electronicdesign.com/analog/use-excel-calculate-d-level-shifter-resistor-values

   

http://www.psocdeveloper.com/forums/viewtopic.php?t=3839

   

Or use a simple technique shown in this article, attached spread sheet helps you

   

calculate the resistors.

   

 

   

Regards, Dana.

0 Likes
Reply
Esteemed Contributor

As far as 8 bit DMA to VDAC, the following may help -

   

 

   

http://www.cypress.com/?app=forum&id=2232&rID=57151

   

 

   

Regards, Dana.

0 Likes
Reply
Esteemed Contributor

One other technique, shown in attached.

   

 

   

R needs to be selected as a high value, to minimize signal loading, but not so high that

   

ADC and C leakage create a large offset across it.

   

 

   

C and R form a high pass filter, so C value controls LF cutoff of this filter, choose its size to

   

pass your lowest frequency of interest.

   

 

   

Note this eats up an additional pin.

   

 

   

Regards, Dana.

0 Likes
Reply