Actual acquisition time in "configure ADC" for PSoC4100S plus

[YoIs_1298666]

Hello,

I have a question about acquisition time in "configure ADC".

In "General" tab, I set "Clock frequency(kHz):" to 16000kHz.

In "Channels" tab, I set "A cloks:" to 5. So, the acquisition time should be 312.5ns.

Why?

In the case of 281.25ns, the ADC clock frequency will be 17.777MHz.

The conversion time seems to be correct.

Conversion time = (5+14)/16MHz =  1.1875 us

Conversion time means the total acquisition time and conversion time.

Best regards,

Yocchi

[Vasanth · Accepted solution]

Hi,

The actual sample time is modified by changing the register setting SAMPLE_TIME0/1/2/3

See the register definition. The actual sample time will half cycles less(4.5 times in your case)

Best Regards,

Vasanth

[YoIs_1298666]

Hello Vasanth-san,

Thank you very much for your reply.

if the sample time is 4.5cycles, the conversion time is 1.156us[(4.5+14)/16MHz].

The conversion time error will increase.

Best regards,

Yocchi

[YoIs_1298666]

Hello Vasanth-san,

The conversion time error will increase, right?

Best regards,

Yocchi