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Hi,
I'm working on a project where I need to interface a 4200 device to a number of external 5V signals. The problem I'm having is that when I remove the main power from VDD, if the external signals are alive (all are high when idle) that voltage on the external pins filters through the GPIO circuitry and is enough to maintain the device powered. Is there a way to prevent this, or am I forced to use opto isolators for all the I/O (including a couple of serial ports). That alternative will increase the cost, complexity, and size of the final product.
Solved! Go to Solution.
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Hi,
If your device you are using SIO or GPIO_OVT pins you can avoid the problem for those many number of pins. A pin configured for hot swap capability is mapped to an SIO or a GPIO Over-Voltage Tolerance (GPIO_OVT) pin that supports hot-swap capability in hardware. Hot swap capability allows the voltage present on the pin to rise above the pin's VDDIO voltage, up to 6.0 V. Hot swap also does not allow a pin with any voltage up to 6.0 V present to leak current into the PSoC device even when the PSoC device is not powered.
Best Regards,
VRS
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gullidrmo,
Digital isolation is pretty much a must when interfacing to the '''exernal world'. It doesn't have to be an optocoupler, many other types exist. As an example, we had a device where several boards communicate through I2C. Without io buffer, the I2C chips had to be replaced several time a day, adding a buffer solved problem.
As a cheap alternative try a series resistors ~1k range. This will slow down edges to about 100ns, which is ok for serial port.
/odissey1
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Hi,
If your device you are using SIO or GPIO_OVT pins you can avoid the problem for those many number of pins. A pin configured for hot swap capability is mapped to an SIO or a GPIO Over-Voltage Tolerance (GPIO_OVT) pin that supports hot-swap capability in hardware. Hot swap capability allows the voltage present on the pin to rise above the pin's VDDIO voltage, up to 6.0 V. Hot swap also does not allow a pin with any voltage up to 6.0 V present to leak current into the PSoC device even when the PSoC device is not powered.
Best Regards,
VRS
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Hello,
I worked before with another device from the PSOC 4 series that sports GPIO_OVT ports, but I'm not sure if the one I am using now has either SIO or GPIO_OVT ports. I'll do my homework and confirm with the specs sheet, but if not, I'll go for port isolation with opto couplers. The advise offered above using buffers is also valuable for cost sensitive applications, but since the real state and cost is about the same for buffers or opto couplers I'll rather play safe and go for the later.
Thanks!