PSoC™ 4 Forum Discussions
Hi, just got the CY8CKIT-041-40XX kit that have a 4000S device.
I'm trying to do some basic logic gates with the SmartIO component, i'm using two input pins and a output pin, i would like to have pull-ups in both input pins but the configuration window i got an error:
"Use of drive modes which are not High Impedance with hardware-routed input requires a port adapter, but the selected device does not have one."
I kind of do not understand the error, the devices does not have pull-ups, or the pull-ups are not available for pins that have hw connection option enabled?
Thanks in advance
-Carlos
Show LessHello,
can me sombody help, please...?
When I call the function to connect: CyBle_GapDisconnect(), the first ble module started to connecting. The second ble is switched off.
The first module ist in the state: CYBLE_STATE_CONNECTING a try to connect to second module (its switched off). My problem is,
that first module is try to connect about 30s. I need to decrease this the time (for example 10s), but where?
The setting in the connection parameters: min time is set to 7.5ms, max to 30ms, supervision timeout: 1000ms.
Thank you
Show Lesssoftware platform :WICED3.6; hardware platform:BCM43438; OS:FreeRtos
I use function "wiced_bt_l2cap_update_ble_conn_params" to update conn params on slave device after connection is up.
How do I know whether these params work? Because master device may refuse the update request.
Show LessI added the Bootloadable component, removed the LCD component, and changed the Baud rate to 31250 (standard for MIDI), edited main.c to create an endless loop transmitting 3 characters every second. Programming is successful (takes about 10-15 seconds). But Verify fails with cannot read data from device. The debugger cannot find the target device.
Show LessHello, I have a CY8CKIT-049 42xx board and I was wondering if It is possible to use it as a hid. If so do you know where I could find documentation on it? Thanks!
Show LessHello,I'm trying to send a sin signal and display it on CySmart, I changed the Heart Sensor example but I only receive 0 and I don't know why. I also try to send an ADC data and a string and display on TeraTerm but I'm not able to make it work.
Can someone help me ? I'm here for more informations
(I'm using PSoC Creator 3.3 and the CY8CKIT-042_BLE)
Show LessHi,
I am using PSoC4 CapSense_2.10. I would like to carry out an action like turn an LED on when the sliding gesture is carried out on a slider or any capsense widget.
By sliding gesture I mean that all the capacitive sensing elements in the slider have to touched in a sequence or the finger has to slide through all of them to recognize the slide gesture. Is this possible with any CapSense Widget?
regards
Show LessHi all,
Im using BLE-UART project, everything working well with Android CySmart App. However, I'm encouterring authentication issue on IOS CySmart App. At the first time after flashing firmware, I can connect to cypress module after key in correct passkey on IOS App. However, after reset cypress module, Android App will request passkey again and connect well but IOS App doesn't request till time out. I have no way to connect again with IOS CySmart App. Anyone have solution ?
Thanks
Show LessIs 64k external memory adequate for use with the CYBLE-22001-00 device?
I'm new to the Cypress Environment and am using the CY8CKIT-042-BLE Pioneer Kit and PSoC Creator 3.3 to develop an application. I have seen where a digital output pin which was supposed to be enabled by a PWM output was instead always enabled as though the ENA pin was tied hi. By switching the pin the problem was corrected. I'm now being stumped as to why an Analog pin set to Hi impedance and tied directly to the negative input of the first Op amp has a lo impedance connection to 4.22V on the Kit board (assigned by the tool to P1-4, pin 32). I have included a N_1_SetDriveMode(N_1_DM_ALG_HIZ) instruction in the code for the pad with no change. Could someone give me some new things to check that may be causing this? Also, I have wired together (in the TopDesign tab) the positive inputs of both opamps together to an analog hi-z pad and to the unused analog mux inputs for channel 1-3 along with the negative input for channel 0. I set the ADC_SAR_12Bit to use internal 1.024V VREF, bypassed and to sample differentially. The analog wiring diagram reflects the circuit I entered properly. However, the pin has 2.54V appearing on it rather than the 1.024V I expected. Is there something fundamentally wrong with this configuration? Thank you, Richard
Show Less