PSoC™ 4 Forum Discussions
I am an inventor with no electronic expertise. In 2009 I received a patent patent for a device targeted at the hospitality market. In 2009 I licensed the patent. That company went bankrupt before producing the product so I now have rights to it again. I have a circuit but would like to upgrade the CPU to what is available today. It is a simple capacative touch device. I can email the previous circuit if that will help?
Show LessI tried to connect the BLE dongle to CySmart, but received a message that it is an unsupported target.
After that, I tried to upload a hex file for the BLE dongle provided by cysmart using the psoc tool,
but I received the message "The hex file does not match with the acquired device, please check the device".
I tried it before I updated the programmer firmware, I tried it after updating it,
but I can't get the same message and can't connect the dongle API properly. How do I fix this?
I surely select correct chip on CY5677 and, insert ble dongle in usb slot.
Show LessHello,
Would you please recommend any part number Cypress BLE module same as panasonic PAN1326B?
PAN1326B uses CC2564B (by TI) inside the module.
Our customer is searching a BLE module with electric wave certification in Japan.
Thanks and best regards;
Maru
Show LessHi,
I am just wondering what the legal requirements are for retailing a product that makes use of a PSOC 049 board as a component.
Is it just that, a component, or are there other requirements in place?
Hi,
I am looking for a solution for an EEPROM storage for a 4000S PSOC 4 microcontroller. It does not show up in the components, and when I try to add a work around that Cypress provided for their BLE componets - a Em_EEPROM header and source file, I get build errors - 'undefined reference to 'Em_EERPOM_Write'. Any ideas?
See attached for project.
Thank you,
Tom
Show LessHi Sir,
Now I have an project using CY8C4126AZI-S433, the bootloader address 0x0000~ 0x4FFF ,The app address , 0x0000~ 0xFFFF.The customer need write the some data at the top of app.for example ,if I offset the app at 0x5000, but I find that at the address is the VectorTable ,How can I offset the VectorTable, and write the data to 0x5000?
Thanks.
Show LessHi,
I have a problem with getting spi master clock oversampling factor below 6.
In the datasheet it claims I can set it to 2 if I have MISO pin removed.
The only place I see that I can remove the MISO pin is by ticking the box under the SPI Pins tab, and click remove MISO.
Unfortunately, as soon as I try to reduce the oversampling factor to less than 6 I get
Invalid Parameter:
Error 1: The SPI master oversampling factor must be in range 6 - 16.
Any Idea of how I can get around this or have I completely misunderstood the section in SCB_P4_v4.pdf page 93
For Master the minimum oversampling value is 6 (MISO presents) or 2 (MISO removed).
Kind regards
Hjalmar
I have a design where I am getting the warning:
Warning: sta.M0021: project_timing.html: Warning-1350: Asynchronous path(s) exist from "Clock_1(FFB)" to "CyHFCLK". See the timing report for details.
This warning is not an error in my design, as I know that the data is stable for the time period that I am registering it. I'd like to have permanently ignore this warning, so it doesn't show up on every build.
Is there a timing constraints file (like those found in FPGA tools) or other method that I can have the tools ignore this path?
Brian
Show LessHI,
I want to give clock pulse in to a output pin,after a count remove that clock.I am attaching my code with this,but this is not working
module component01 (
output reg step,
input clk,
input clock
);
parameter count_value = 10;
//reg [count_value:0]count ;
reg [count_value:0] temp_count ;
always @ (posedge clock)
begin
step <= clk;
if(temp_count < count_value)
temp_count <= temp_count +1;
//else
if(temp_count==count_value)
step <= 1'b0;
end
end
endmodule
Show LessHi,
I'm using a CY8C4247 for a CANBus based motor controller. Occasionally the system hangs completely and become unresponsive to any CAN messages, it seems like a firmware bug somewhere but I cannot get it to behave this way while debugging which is what is confusing me. Not every device on the bus hangs all the time, but occasionally they will (only tested it with 2 devices so far). I put an LED toggle in the CAN_ISR and it when it hangs it doesn't appear to be hitting the ISR.
I'm working through to see if there is a sequence of commands that cause my firmware to lock up, but I'm curious what could change in debug mode? FWIW with the debugger hardware attached but not debugging it still hangs (so it doesn't appear to be a power or ground issue). Could the presence of the SWDCLK possibly be helping the HFCLK accuracy? I only ask as the only known hardware issue on the design right now is a missing WCO so I'm running the CAN at it's slowest speed and hoping for the best, so far it appears to be working ok (next hardware Rev will have WCO).
Regards
Show Less