PSoC™ 4 Forum Discussions
Hi,
I am a junior developer I just get started with CySmart app because I want to create a simple android app that will only update on bootloader.
So I'm trying to update a firmware from a cyacd file.
First from the CySmart app, i'm connecting to my device and write an hex value on a service to activate the bootloader mode. But this step done i'm not able to find the device from the android app, and i don't where the issue can came from because on the iphone app I found it with the bootloader activated in the courousel of services.
Any help or advice is appreciated
Georges
Show LessIs there any difference between zero and one
when it comes to setting the buffered compare register
of the PSoC 4 Timer Counter Pulse Width Modulator (TCPWM) PSoC® Creator™ Component?
f(0) = f(1) ??
From the data sheet we have:
Note PSoC 4000 devices write the 16 bit compare buffer register with the decremented compare value in the Up counting mode (except 0x0u), and the incremented compare value in the Down counting mode (except 0xFFFFu).
So let's say we are up counting. We want zero.
So, we must write a zero.
Ok, now we are tired of zero. We want ONE. So, we write the "decremented" version of ONE, which is zero, again.
What changed?
(The other case, counting down, is similar, but perhaps worse?)
I see the philosophy of one versus zero has changed on PSOC 4. Where is this headed?
.
Show LessHi,
I am setting BLE device as a GAP peripheral and trying to pair with Cysmart app.
Pairing is not working.
security setting are : mode 1 | unauthenticated pairing with encryption.
I/O Capabilities - none
bonding requirement -Bonding
Encryption key size - 7 bytes.
call back generating following event -
case CYBLE_EVT_STACK_ON: CyBle_GappStartAdvertisement(CYBLE_ADVERTISING_FAST);
case CYBLE_EVT_GAPP_ADVERTISEMENT_START_STOP:
following event are generating when start pairing process from cysmart app :
case CYBLE_EVT_GATT_CONNECT_IND:
case CYBLE_EVT_GAP_DEVICE_CONNECTED:
case CYBLE_EVT_GAP_SMP_NEGOTIATED_AUTH_INFO:
case CYBLE_EVT_GAP_AUTH_REQ: res = CyBle_GappAuthReqReply(cyBle_connHandle.bdHandle, &cyBle_authInfo); - error - CYBLE_ERROR_INVALID_OPERATION
case CYBLE_EVT_GAP_AUTH_FAILED: error - CYBLE_GAP_AUTH_ERROR_LINK_DISCONNECTED ;
case CYBLE_EVT_GATT_DISCONNECT_IND;
why CyBle_GappAuthReqReply() is invalid operation?
Show LessHi,
I was investigating in the community about the boot time for PSoC4.
Then I found the above information of KBA.
The resource for this information is 2011.
We think probably about PSoC1.
Do you have similar information about PSoC4 series?
Regareds,
Masashi
Show LessHi,
I am trying to perform a non-blocking emulated EEPROM using P4000S, because code example em_EEPROM is calling blocking write row, not non-blocking write row, this cause 20ms blocking delay, can’t handle 1ms timer interrupt for critical task.
TRM did say that non-blocking system calls can be called from a code executing out of RAM, so I located timer interrupt and other functions into RAM, then call non-blocking write row instead of blocking write row in CyFlash.c, but still not working, CPU is not halted after calling non-blocking flash write row, 1ms timer interrupt is handled, but EEPROM data is not written correctly into flash.
Could anyone tell me whether it is possible to implement a non-blocking emulated EEPROM and how to do.
The SPC interrupt, how to use?
The code in TRM: 20.7 Non-Blocking System Call Pseudo Code, seems not right, SPC interrupt is not triggered after calling non-blocking write row, is there something wrong?
CY_SECTION(".sramCode") __USED
void SpcIntHandler(void)
{
//Write key1, key2 parameters to SRAM
REG( 0x20000000 ) = 0x0000DCB6;
//Write the address of key1 to the CPUSS_SYSARG reg
CPUSS_SYSARG_REG = 0x20000000;
//Write the API opcode = 0x09 to the CPUSS_SYSREQ.COMMAND * register and assert the sysreq bit
CPUSS_SYSREQ_REG = 0x80000009;
// Number of times the ISR has triggered
iStatusInt ++;
}
void SPC_SetVector(cyisraddress address)
{
CyRamVectors[CYINT_IRQ_BASE + 9] = address;
}
int main(void)
{
uint8 i;
/* Enable global interrupts. */
CyGlobalIntEnable;
/* Set the ISR to point to the Interrupt. */
SPC_SetVector(SpcIntHandler);
/*CM0 interrupt enable bit for spc interrupt enable */
CM0_ISER_REG |= 0x00000040;
/*Set CPUSS_CONFIG.VECS_IN_RAM because SPC ISR should be in SRAM */
CPUSS_CONFIG_REG |= 0x00000001;
...................
Show LessHi,
We are updating the firmware of our product that uses a BLE module (CYBLE-212019-00 / CYBLE-212020-01) connected to a host processor, controlled via EZ-serial API. In short, we have a problem when an indication is sent just after fast notifications. The indication often fails to be received on iOS or Android devices. We implemented a mechanism to delay the indication, because we suppose that the indication is sent in the same connection interval than the notifications. With a delay equals to the connection interval, the indications are successfully sent and acknowledged. Does our assumption that the indication can be sent in the same connection interval than notification is right? Is there any proper way to ensure that an indication is sent in a new connection interval (because a buffer of operations on BLE module may break the delay strategy)?
In details:
The BLE module is configured as GATT server with custom services. Notifications are sent on a characteristic at high frequency and data loss for these notifications is not a problem. The command “gatts_notify_handle” of the EZ-serial API is used for the notifications. Sometimes notifications are sent with an interval of 3 to 5 milliseconds, and since iOS and Android limit the number of transfers in a single connection interval, some notifications are lost (which is expected).
We use indications on another characteristic for data that need to be transmitted without loss. The command “gatts_indicate_handle” is used for sending indications, and we wait until the event “gatts_indication_confirmed” (or a timeout) to send new indications or notifications. Without any delay for sending the indication after a bunch of notifications, the indication is often lost. We implemented a delay mechanism to send indications. The delay for sending an indication is set to the connection interval to avoid multiple transmissions when the indication is sent. This works correctly but seems not optimal. Hence my question, how to properly send an indication when fast notifications have been sent.
Thanks,
David
Show LessWhy I can not write to Tech support.
I purchased a CY8CKIT PSoc Creator 4.2 say the device was recognized but I can program , The kit is new why ?
Show Less
We are using CY8C5888LTI-LP097 controller and we need to implement USB to SPI via USB HID,
I wonder if I can get the source code for AN14558 App Note.
Regards
Alberto
Show Less