PSoC™ 4 Forum Discussions

Hi,

I'm working with a PSoC 4 BLE device project. After pairing two devices, the device in central role starts observing and the peripheral device starts broadcasting I'm seeing the connection drop occasionally after the central device starts observing. Here is the method that starts observing. Any help would be appreciated.

void StartObserving(void)

{

    cyBle_discoveryInfo.scanTo = CYBLE_SLOW_SCAN_TIMEOUT;

    cyBle_discoveryInfo.scanIntv = CYBLE_SLOW_SCAN_INTERVAL;

    cyBle_discoveryInfo.scanWindow = CYBLE_SLOW_SCAN_WINDOW;

    cyBle_discoveryInfo.scanType = 0;

    cyBle_scanningIntervalType = CYBLE_SCANNING_SLOW;

    CyBle_GapcStartDiscovery(&cyBle_discoveryInfo);

}

Hi,

I'm using PSoC 4 in a BLE application. The specific device is CY8C4247LQI-BL473.

I have the following piece of code:

int32 passwd;
uint8 cypher[16];
/*
     some code here, cypher buffer is loaded
*/
passwd= cypher[0] + cypher[1]*0x100 + cypher[2]*0x10000 + cypher[3]*0x1000000;
if(passwd < (int32) 0)
{
     passwd = passwd * (int32)(-1);
}

I'm facing the following issue: depending on the optimization level I choose, the test at 10th line is always false.

Optimization levels None, Debug and Minimal work fine. But with level High, Speed and Size the "if" command result is always false, even with valid values.

I'm setting the optimization level via "Build -> Build Settings -> Configuration: Release -> ARM GCC 5.4-2016-q2-update -> Optimization -> Optimization Level".

Can someone please help me understand what is going on here? Is there something I'm missing?

Here follows some further details:

Environment:
PSoC Creator  4.3 (4.3.0.1445)
Culture: Portuguese (Brazil)
OS Version: Microsoft Windows NT 10.0.18362.0
CLR Version: 4.0.30319.42000
Installed CyInstaller Products:
Peripheral Driver Library 3.0.1
Peripheral Driver Library 3.1.1
PSoC Programmer 3.28.7
PSoC Creator 4.3
Loaded Plugins:
Name: Toolchain Manager
Version: 4.3.0.1445
Company: Cypress Semiconductor
Description: PSoC Creator Toolchain Manager
Name: ARM GCC Generic
Version: 4.3.0.1445
Company: Cypress Semiconductor
Description: ARM GNU Generic
Name: ARM MDK Generic
Version: 4.3.0.1445
Company: Cypress Semiconductor
Description: ARM MDK Generic
Name: ARM IAR Generic
Version: 4.3.0.1445
Company: Cypress Semiconductor
Description: ARM IAR Generic
Name: DP8051 Keil Generic
Version: 4.3.0.1445
Company: Cypress Semiconductor
Description: DP8051 Keil Generic

Thank you very much.

Cheers,

Yuri

Hi Cypress Team,

Would you kindly answer why the raw count value(CapSense_bistRawcount) in bist function api CapSense_GetSensorCapacitance is not equal to the raw count in CapSense_dsRam.snsList.button0[0].raw[0]

I configure capsense component just same to the settings in CapSense_GetSensorCapacitance. Then when I debug the project, I got 0x374 of the  CapSense_bistRawcount, and CapSense_dsRam.snsList.button0[0].raw[0] is 0x8f.

I attached my project

Thanks very much

Sophie

Hi,

When using UART (scb mode), the most use case is that one would use the built-in pull-up on the TX-line (not adding an external pull-resistor).

Questions:

- What is the pin/drive type for the UART TX pin?

- Can this be changed?

- Use case is to connect two UART's in parallel (software knows when it's ok to send).

  Would it be safe to just tie them together or should I wire the TX coming from "CPU 2" to an input of "CPU 1" to achieve a buffer, and also the option of adding a simple logic block that checks if uart_tx on "CPU 1" is driving, thus disabling incoming TX, not passing it through.

Hi

I have created a simple component to try to control flow based on data is a F0 (lots wrong with the example).

There are two things that I don't understand:

1. fifoEmpty doesn't appear to be working as expected - the loop continues indefinitely.
2. I am not getting shift data output

I have attached the example but include the images below as well.

Thank you!

Mike

Is there programmable logic in a PSoC that's active before running a "Start" for the individual component or logic section?

Specifically, what programmable logic or pin states within a PSoC are functional at power up before the MCU is Active or reset is released?

Greg

Using this code:

uint8_t InterruptState = 0 ;

    InterruptState = CyEnterCriticalSection();

     // I do something here, couple of msec.

    CyExitCriticalSection(InterruptState);

Are interrupts happening during CriticalSection are saved and activated on exit?

If the same interrupt occurred several times during CriticalSection how many times will it get executed on exit?

Is there a better way to protect code from ISR?

I use cy8y4124. based on a io I like to set clock for PWM module to 12MHz in one case and 1,2MHz in the other case. How to adchive this ?

I am trying to implement deep sleep using a timer interrupt after say 10 seconds it should display "test" on serial monitor and again it should go to deep sleep for next 10 seconds. is it possible?

I have written code but my CY_ISR is not getting triggered.

I have attached a zip file.

Thanks in advance

Regards,

Neeraj