PSoC™ 4 Forum Discussions

Hello,

We don't have an error when implementing CSD and building the project on a CY8C4146AZA-S245 that doesn't have a CSD.

Is this a PSoC Creator specification?

Best regards,

Yocchi

Hello, 

I am attempting to establish a UART communication between two boards, a PSoC 5LP board and a PSoC 4 (CY042) board. I have tested the UART on both boards by sending and receiving commands on PuTTy, and it works ok. 

I wanted to know whether there needs to be any level shifting module or a pull-down resistor in this interface? If yes, what value?

Also, how do I make this connection? On the PSoC 4, I need to connect the associated pins to the bridge externally. Do I avoid this step and directly connect these pins to the PSoC 5LP? 

Thanks for your help. 

I have been trying to use DMA to transfer a pre-defined byte array  out of a transmit only standard UART.

Everything works fine when a DMA channel is defined for both Tx and Rx (Based on the DMA_UART_PSoC4 example code) and everything works as the interrupts are turned off, the second descriptor deleted and all the code except the  "RxDma_Start((void *)UART_RX_FIFO_RD_PTR, (void *)uartBuffer0);" deleted. When this line is deleted, or the RxDma  block removed the schematic the TxDma stops working.

I am clearly missing something or there is some deep reason for this, anyone got any insights?

Many thanks

  Dave

Dear Cypress,

One of our customer has been using CY8C4025LQI-S412,

but because of availability of the device,

they wonder if they can use CY8C4045LQI-S412

with the binary file of CY8C4025LQI-S412.

I would think that the usual programmer will refuse to program a 4025 binary to 4045.

But I wonder if there is/are way/method to apply  CY8C4025LQI-S412 binary to CY8C4045LQI-S412.

Best Regards,

8-Jun-2021

Motoo Tanaka

Dear Supports.

I am using a PSoC 4000S 48Pin.
I want to set Pin7 to INTP0 and Pin27 to UART interrupt (Enable wakeup from Deep Sleep Mode = Active). When I set the UART interrupt, I cannot set the interrupt for the P0.x port. Why are there conflicts in interrupt settings?

Thank you.

Several years ago, we bought a product that uses PSOC 4 BLE chips (CY8C4247LQI-BL483 and  CY8C4127LQI-BL473). Now we've decided to upgrade its firmware using its bootloader. There is a host MCU on the board so we can use a UART bootloader.

The problem is that each Bootloadable project needs the hex file of a corresponding ‌Bootloader project. Currently, we don't have access to ‌the Bootloader project and it seems that the manufacturers have altered the Cypress default bootloader project in AN68272 application note. (Since it utilizes a baudrate rather than 57600).

Is it possible to acquire Bootloader hex file from PSOC flash? It is not locked. Or is there any way around this problem?

Hello😀

  Will CI and RI test  effect the raw data of capsense？ 

Hello,

I am studying a system which require 2 sliders (9 positions) + 7 buttons. I made a quick on the CY8CKIT-149 development kit which implement the CY8C4147AZI-S475. The slider implementation is very efficient.

I also noticed the CY8C4126AZI-M445 reference with less RAM (8KB) compared to the CY8C4147AZI-S475,  which is not a problem for my application. I would like to know if the capsense part is the same as CY8C4147AZI-S475.

Best Regards