Using SYSCLK as a clock source

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OlCh_4641241
Level 1
Level 1
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Hi

I usually using sysclk as a main timer source clock in other arm cortex based MCU.

In topdesign file of the PSoC Creater4.3, I can't find the way how to use sysclk as a source of the clock component.

there is only available HFCLK .

How can I get it?

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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

I tried this with PSoC 4 4200M (CY8C4247AZI-M485, which is on the CY8CKIT-044).

If we double click "clocks" in the Workspace Explorer > <Project> > Design Wide Resources > Clocks

We can see the clock settings,

000-DWR-CLOCK.JPG

And if we double click the row of the clock in interest, here, I double clocked the right side area of "SysClk"

We can see the clock tree.

001-Conig-System-Clocks.JPG

As you can see, the source of "SysClk" is "HFClk".

And SysClk's Divider is 1.

So I thinks that in this case, using HFClk is similar as using SysClk.

moto

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MotooTanaka
Level 9
Level 9
Distributor - Marubun (Japan)
First comment on blog Beta tester First comment on KBA

Hi,

I tried this with PSoC 4 4200M (CY8C4247AZI-M485, which is on the CY8CKIT-044).

If we double click "clocks" in the Workspace Explorer > <Project> > Design Wide Resources > Clocks

We can see the clock settings,

000-DWR-CLOCK.JPG

And if we double click the row of the clock in interest, here, I double clocked the right side area of "SysClk"

We can see the clock tree.

001-Conig-System-Clocks.JPG

As you can see, the source of "SysClk" is "HFClk".

And SysClk's Divider is 1.

So I thinks that in this case, using HFClk is similar as using SysClk.

moto

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