UDB FIFOs not empty

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MiRe_4638356
Level 3
Level 3
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Hi, Following some FIFO issues I am trying the following simplified code to show whether the FIFOs are empty:

CyGlobalIntEnable; /* Enable global interrupts. */

    /* Place your initialization/startup code here (e.g. MyInst_Start()) */

   

    UART_Start();

    UART_UartPutString("\n\r*****************\n\r* LED2472G Test *\n\r*****************\n\r");

   

    // Initialise LED2472G

    UART_UartPutString("Enable LED2472G");

    CyDelay(2000);

    LED2472G_1_ClearFIFOs();

    LED2472G_1_Enable(1);

    UART_UartPutString("... OK\n\r");

   

    sprintf(uart_str,"First Data F0: %d\n\r",LED2472G_1_DataFIFOEmpty());

    UART_UartPutString(uart_str);

    CY_SET_REG8(LED2472G_1_DPData_u0__F0_REG, (uint8)(0x0A));

    sprintf(uart_str,"Second Data F0: %d\n\r",LED2472G_1_DataFIFOEmpty());

    UART_UartPutString(uart_str);

       

    sprintf(uart_str,"First LE F0: %d\n\r",LED2472G_1_LEFIFOEmpty());

    UART_UartPutString(uart_str);

    CY_SET_REG8(LED2472G_1_DPLE_u0__F0_REG, (uint8)(0xEE));

    sprintf(uart_str,"Second LE F0: %d\n\r",LED2472G_1_LEFIFOEmpty());

    UART_UartPutString(uart_str)

(does not matter if I call this or not)

void LED2472G_1_ClearFIFOs()

{

        // Clear the FIFOs

        LED2472G_1_DPLE_F0_CLEAR;

        LED2472G_1_DPData_F0_CLEAR;

}

uint8 LED2472G_1_DataFIFOEmpty()

{

    // Check that both FIFOs have space

   

    return((LED2472G_1_Status_Read() & LED2472G_1_DATA_EMPTY) == 0);

   

}

uint8 LED2472G_1_LEFIFOEmpty()

{

    // Check that both FIFOs have space

   

    return( (LED2472G_1_Status_Read() & LED2472G_1_LE_EMPTY)== 0);

   

}

Where the output is:

pastedImage_1.png

I am completely lost as to why are the FIFOs coming up as not empty?

I must be missing something simple.

Thanks!

Mike

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1 Solution

Turned out to be a silly error in the DP output logic. || instead of &&.

Mike

View solution in original post

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5 Replies
MiRe_4638356
Level 3
Level 3
First like received First like given

These didn't show in first message:

pastedImage_1.png

pastedImage_0.png

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Turned out to be a silly error in the DP output logic. || instead of &&.

Mike

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Ekta_N
Moderator
Moderator
Moderator
750 replies posted First like given 250 solutions authored

Hello MiRe_4638356

If possible can you please attach you complete project? Also could you please let me know the PSoC 4 device you are using so that I can tryout the project on a similar device at my end.

Best Regards

Ekta

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Hi,

I should add that I am using the CY8CKIT-042.

Thank you,

Mike

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