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I would like to be able to send a command to the psoc that will switch the SWD pins back from GPIO mode to SWD mode. I know there is a setting for this in the system tab but I do not see any obvious way to set this during runtime. Is it possible?
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PSoC 4 Architecture
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rzzh,
I am trying to create an HSSP programmer for the psoc4. The host processor on this specific board cannot easily reach the clock rate required to acquire the chip (even when driving the clock in kernel space). However, if the psoc has the SWD pins configured as SWD (instead of GPIO), it can acquire it without needing to reach strict timing requirements. My plan was to disable the GPIO functionality on the psoc and switch to SWD before attempting to flash.
Ethan
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Hi Ethan,
As I knew, HSIOM registers controls the connection of IOs. I haven't tried to set SWD pin in run time, not sure if this HSIOM operation is enough to make it work.
Take PSoC4200 as an example, its register map: http://www.cypress.com/documentation/technical-reference-manuals/psoc-41004200-family-psoc-4-registe...
Thanks,
Ryan
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Hi Ethan,
I just...have a question about this setting...
Why would you like to change it in run time? If changed successfully, when would you like to run it in debug mode?
You know, if it is entered debug mode, the chip will reset, and run the code from start again...
Thanks,
Ryan
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rzzh,
I am trying to create an HSSP programmer for the psoc4. The host processor on this specific board cannot easily reach the clock rate required to acquire the chip (even when driving the clock in kernel space). However, if the psoc has the SWD pins configured as SWD (instead of GPIO), it can acquire it without needing to reach strict timing requirements. My plan was to disable the GPIO functionality on the psoc and switch to SWD before attempting to flash.
Ethan