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Hi,
I'm trying to use a Timer Coutnter PWM to drive the clock input of a Slave SPI.
I don't want to use separate Pins for SPI Clock and PMW Output and then short them together.
In the attached project I'm trying to route the PWM Signal internally through Port 2 Smart IO (PWM sent on P2.1 and P2.2).
I can always see the PWM Signal with the oscilloscope on P2.1, while signal on P2.2 is visible only if I don't connect Data 2 to SPI Clock input.
Can You please Help?
Thanks,
Alfonso
Solved! Go to Solution.
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PSoC 4 Architecture
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Dear Alfonso-san,
I tried with my board which has CY8C4146LQI-S433,
and observed what your are mentioning.
Then I came up with this feeling, without any technical proof though,
the fan-out of SmartIO may be very weak.
So if we connect 2 fan-ins it can not drive the signal.
So I modified the SmartIO config as below.
(I routed another output for GPIO to P2[3])
Then I modified the schematic as below
Right now even data2 is connected to s_sclk, the CLKOUT is generating the clock OK.
So I think that up to Tick_PWM and SmartIO_P2 is working.
> As SPI Was not working, I've Added the two GPIOs to verify wether the PWM Signal reached the SPI Clock Input.
I think that a SPI Slave requires a falling edge of s_ss to start transfer so connecting "0" will make it not operational.
Best Regards,
3-Aug-2020
Motoo Tanaka
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Hi Moto,
I've tried the configuration You suggest before asking to the forum.
As SPI Was not working, I've Added the two GPIOs to verify wether the PWM Signal reached the SPI Clock Input.
The PWM Works Fine (Signal available on P2.1 and P2.2) if I Disconnect it from SPI SCK.
PWM Signal stops on P2.2 ONLY once I Internally connect SCK Signal.
Anyway removing the GPIOs from the project means being unable to monitor PWM Signal with the oscilloscope.
I'm using CY8CKIT-145-40XX Prototyping Kit to test this Project.
Thanks,
Alfonso
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If you choose to use input count (default setting), the count mode should be set to LEVEL, or PWM won't have output. The smartio configuration provided by Moto works on DVK, i tested it.
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Dear Alfonso-san,
I tried with my board which has CY8C4146LQI-S433,
and observed what your are mentioning.
Then I came up with this feeling, without any technical proof though,
the fan-out of SmartIO may be very weak.
So if we connect 2 fan-ins it can not drive the signal.
So I modified the SmartIO config as below.
(I routed another output for GPIO to P2[3])
Then I modified the schematic as below
Right now even data2 is connected to s_sclk, the CLKOUT is generating the clock OK.
So I think that up to Tick_PWM and SmartIO_P2 is working.
> As SPI Was not working, I've Added the two GPIOs to verify wether the PWM Signal reached the SPI Clock Input.
I think that a SPI Slave requires a falling edge of s_ss to start transfer so connecting "0" will make it not operational.
Best Regards,
3-Aug-2020
Motoo Tanaka