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PSoC 4 MCU

Anonymous
Not applicable

I have a PSOC 4 BLE based project that runs off of a LiIon battery.  The PSoC runs off of 3.3V, from a buck/boost regulator, so that I can run off the battery from a high of over 4V to a low of under 3V.

I'd like to be able to measure the battery voltage via the PSoC ADC.  This Cypress article has a great hack to read the battery voltage without using a voltage divider, by sample/holding the internal 1.024V Vref on an external cap, and then reading back the external caps voltage with VDDA as Vref:

http://www.cypress.com/blog/psoc-hacker-blog/measuring-vdd-battery-volts-psoc4

However, this only works for VDDA > VDDD, as that is a requirement of the PSoC (per the PSoC 4 family datasheet).

I really like the approach in the article, because:

  • As opposed to a voltage divider, it does not drain the battery all the time.
  • It requires just one external component.

Any thoughts on how I could accomplish this even when the battery voltage is less than VDDD?

Thanks!

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Honored Contributor II

Current consumption != input current. It doesn't matter how much current the ADC is drawing from Vdd, this will not cause the voltage divider to give wrong readings. Unfortunately the input resistance, which is important here, is not better. So you need an additional OpAmp as buffer.

View solution in original post

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4 Replies
Honored Contributor II

Use a voltage divider on the battery voltage (1:4), and measure it directly. The divider can be really high value (1MOhm or so, which means it draws less current than the buck/boost converter). You cannot measure voltages higher than Vdda (it will destroy the PSoC).

If you really care about the current, switch the lower resistors with a FET.

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Anonymous
Not applicable

Thanks - that was my first approach (the direct approach).  However, I was worried that the minimum current needed to the might be too high (1 mA or more).  I'd like the divider's total resistance to be at least around 1mOhm, to keep the current in single digit uA or less.

I had thought the SARADC requirement was 1mA - but I'm now not sure where I saw that.  In addition, I suspect I can add a non-inverting buffer inside the PSoC so the current requirement at the pin would be minimal.  But I'm not sure...

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Anonymous
Not applicable

The place where I saw the 1 mA was in the SAR ADC datasheet:

http://www.cypress.com/file/135111/download

Specifically, it's the A_ISAR parameter (current consumption) which is listed as max 1 mA.  I suspect (hope) this can be drastically reduced with a non-inverting buffer.

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Honored Contributor II

Current consumption != input current. It doesn't matter how much current the ADC is drawing from Vdd, this will not cause the voltage divider to give wrong readings. Unfortunately the input resistance, which is important here, is not better. So you need an additional OpAmp as buffer.

View solution in original post

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