PWM delay needed after waking up?

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user_1669321
Level 5
Level 5
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Hi,

I'm using the CYBLE-014008-00 and I've had some problems using a PWM module (UDB). I want to use the PWM as a single shot triggered by a Control Register module (i.e. triggered by firmware), and the clock used is LFCLK at 32.768 kHz.

Everything was working fine in active mode and sleep mode, unless I used the functions PWM_Sleep() and PWM_Wakeup(). Then the PWM stopped working.

I tried adding a 30us delay after PWM_Wakeup() and then it works! I can go to sleep and deepsleep with my system without problems.

My question is: is this normal? Do the UDB modules (specifically the PWM) require a delay after waking up? If so, where can I see the specs? By trial and error, I found that I need ~6 microseconds delay after waking up from sleep, and ~40 microseconds after waking up from deep sleep.

Thank you,

Fred

1 Solution

Thank you for clarification.  It seems that the PWM component does not accept a trigger until the first clock edge is provided.  If the problem is that the Control Register component is faster than the PWM component, please try to use same clock for the Control Register and the PWM components.  Following figure is my solution.  But I didn't try if the schematic works well because I have no hardware right now.

GS003336.png

The LFCLK is synchronized with the 24MHz (HFCLK/2) clock and drives both components.  The Control Register is configured as the Pulse mode to generate a one-shot pulse.

Regards,

Noriaki

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