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Dear Sirs and Madams,
We are considering CapSense for PSoC 4S, and we can see fluctuations in the RAW count of PSoC 4S.
The component data sheet of PSoC5LP describes the characteristics of "voltage vs RAW count" and "temperature vs RAW count".
<Excerpt from PSoC5LP CapSense datasheet P.101>
Is it possible to disclose similar characteristics for the CapSense component of PSoC4S?
Regards,
Solved! Go to Solution.
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PSoC 4 MCU
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Hi @MiNe_85951,
The specific graphs mentioned are not available for the PSoC4S device. However, the electrical specifications speak about the maximum allowable ripple voltage on the supply lines.
Based on the conditions, it is recommended to keep the ripple within 50mV or 25mV (whichever is applicable in your application).
Regards,
Nikhil
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Hi @MiNe_85951,
I have forwarded your query to the internal team. I will post a response as soon as I get an update from the internal team.
Regards,
Nikhil
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Hi @MiNe_85951,
The specific graphs mentioned are not available for the PSoC4S device. However, the electrical specifications speak about the maximum allowable ripple voltage on the supply lines.
Based on the conditions, it is recommended to keep the ripple within 50mV or 25mV (whichever is applicable in your application).
Regards,
Nikhil
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Nikhil-san,
Thank you for your answer.
Does PSoC4S also have "Idac current vs Vdd" or "Idac current vs temperature" characteristic graphs?
As with PSoC5LP, does the IDAC of PSoC4S increase the IDAC current when the power supply voltage increases, and decrease the IDAC current when the power supply voltage decreases?
Regards,
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Hi @MiNe_85951,
These graphs aren't available for the PSoC4S device.
CapSense system uses IDACs which are connected to the VDDA supply. Therefore there will be slight variation in raw counts due to variation in VDDA because of IDAC characteristics.
If IDAC is being used in sinking mode, the sensors are directly switched by VDDD, sensitivity changes when VDDD changes. There will not be any dependency on VDDD if IDAC is used in sourcing mode.
The raw count equation has Vref and IDAC parameters. Vref depends on VDDA and IDAC will be tuned with respect to Vref.
So if Vref reduces, IDAC reduces too and vice versa too holds.
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I understand CapSense algorithms.
The RAW count actually fluctuates over time.
The RAW count is calculated from the above formula of AN85951.
So, we are using IDAC Sourcing mode.
Here, N, Fsw, and Vref are parameters with little fluctuation.
Cs is one of the factors that fluctuate, but it is not affected by temperature or external noise.
I think that the increase and decrease of Idac has a big influence.
In fact, with PSoC5LP, fluctuations in the supply voltage had a direct effect on the RAW count.
Therefore, PSoC 4 also assumed that the IDAC value would change due to fluctuations in the power supply voltage.
So I wanted the "IDAC vs VDD" characteristics of PSoC 4S, but I understood that Infineon doesn't have them.
Regards,