PSoC4L : VBUS terminal processing when USB is not used

[MiNe_85951]

Hi,

We would like to confirm the VBUS terminal of PSoC4L.

I read the PSoC4L datasheet and architecture TRM, However I don't know how to handle the VBUS pin when the USB component is not in use.

I understand the following:

-- Excerpt from architecture TRM --

Note that P13[2] (VBUS power pad) cannot be used as a general-purpose I/O – it can only be used as a power signal for the USB PHY.

--  Excerpt from device datasheet --

VBUS: USB voltage. There is no constraint on VBUS with respect to VDDD. However, since it comes from USB, it is
typically assumed to and ideally be 5 V (4.35 to 5.5 V is the range).

[Question]

Since VBUS is an input terminal, I think it is better to connect it to VDDD, but is it okay if VBUS is not connected at all?

Regards,

[Aashita_R · Accepted solution]

Hi @MiNe_85951 ,

I see that you are not using USBFS component in your project. In that case, it should work fine, even if the VBUS is left floating or OPEN. Please try this and let us know if it creates any issue for you.

In case you use USBFS component, you need to follow section "VBUS DETECTION" of PSoC 4200L Architecture TRM : https://www.cypress.com/documentation/technical-reference-manuals/psoc-4200l-family-psoc-4-architect... to meet the requirements of USB physical layer for any USB application.

Best Regards,

Aashita

[MiNe_85951]

Hello Aashita,

My explanation was lacking.
Not using USB means not using USB components.

We couldn't figure out what to do with the VBUS terminal when the USB component wasn't in use.
From your explanation, Don't connect anything to the VBUS terminal of the circuit diagram.

Regards,