PSoC4 PWM (bug) Glitch on Compare Reg Write

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UrPl_1236626
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Hi,

In a PsoC4 project attached below we demonstrate a PWM compare register write bug.

It appears like if reg is written by the CPU at the same time as TC occurs pwm output is forced high for the entire period, and within the next cycle the latest compare value is in effect.

PWM_bug.png

We have tried combinations with RegSwap, which also appears buggy, at certain occasions it swapped immediately.

Looking forward to hearing you and your explanation and best work-around.

Kind regards,
Uros

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Ritwick_S
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Hi @UrPl_1236626 ,

 

Please find the attached project. In this project, I used the compare buffer register to change the compare value, and I used the OV signal for the switch event.  The compare value will be written to the buffer and this will be stored into the capture register on TC event, so the swap does not occur at "any time", it occurs at TC event.  This procedure will ensure that there is no glitch. 

 

Thanks,

Ritwick

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