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PSoC 4 MCU

New Contributor II

Hello, I need to run CY8C4013 in deep sleep mode waking it somehow with a timer,

At the same time I need to have WDT active.

More the sleep timer shall be somehow trimmed to reduce frequency tolerance.

Is there any sample code implementing these features?

Thanks,

Alfonso

1 Solution
Moderator
Moderator

Hi Alfonso,

Keep both WDT and another timer active in Deep Sleep mode...I feel it is a little difficult...

As I knew, regarding clock source, if the chip is in deep sleep, only ILO is active, IMO and its branches will shut down. And all peripherals except WDT is clocked by IMO..

Thanks,

Ryan

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Moderator
Moderator

Hi Alfonso,

Keep both WDT and another timer active in Deep Sleep mode...I feel it is a little difficult...

As I knew, regarding clock source, if the chip is in deep sleep, only ILO is active, IMO and its branches will shut down. And all peripherals except WDT is clocked by IMO..

Thanks,

Ryan

View solution in original post

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New Contributor II

Hi Ryan,

I don't need a second Timer.

I want to use one single timer (driven by ILO) to periodically wake up from deep sleep and to perform WDT Functionality.

More this timer shall be periodically calibrated in order to keep timing tolerances within +/- 10% range (while ILO tolerance is much higher)

Thanks,

Alfonso

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Moderator
Moderator

Hi Alfonso,

Get it. So in this case, WDT can meet your requirement.

To get a +/- 10% tolerance, you may require WDT count calibration. The accuracy of ILO we can't change, but we can calibrate WDT count number of each cycle based on IMO to improve the accuracy of WDT.

We have some WDT code examples with calibration. FYI.

https://www.cypress.com/documentation/code-examples/ce210292-wdt-p4s-example-0

The CapSense Low power code example, remove capsense part, rest is deep sleep controlled by WDT.

https://www.cypress.com/documentation/code-examples/ce210291-psoc-4-capsense-one-button

Thanks,

Ryan

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