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PSoC 4 MCU

New Contributor II

Hi,

Anyone tried to remove it from implementation? I know in EZI2C there is a checkbox, but in I2C I'm not sure what exactly I should remove from original implementation I2C to remove clock stretching.

I need this modification because my I2C Master (micro Renesas K0R) doesn't support these things. And when I tries send enter bootload command I get:

tek00009_LI.jpg

Any ideas? I kindly ask for help.

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Moderator
Moderator

Hi,

Can you check the register SCBx_I2C_CTRL  register (x=0,1 .. depending on which peripheral is being used.). There is a bit S_NOT_READY_DATA_N ACK (bit 15), and S_NOT_READY_ADDR_ NACK (bit 14). They should be 1 if no clock streching is required.  I would suggest you to check the register TRM (https://www.cypress.com/file/285406/download ) page 449-450 for a detailed explanation.

Thanks,

Ashish

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2 Replies
Moderator
Moderator

Hi,

Can you check the register SCBx_I2C_CTRL  register (x=0,1 .. depending on which peripheral is being used.). There is a bit S_NOT_READY_DATA_N ACK (bit 15), and S_NOT_READY_ADDR_ NACK (bit 14). They should be 1 if no clock streching is required.  I would suggest you to check the register TRM (https://www.cypress.com/file/285406/download ) page 449-450 for a detailed explanation.

Thanks,

Ashish

View solution in original post

New Contributor II

Hi,

Thank you very much for your help! I've just added SCB_I2C_CTRL_REG |= 0xF800 line below  /* Configure I2C interface */ in SCB_I2CInit function and I see some progress. Now, write data are sending correctly, but sometimes I'm observing on the oscilloscope response data shifted by one bit. However, in the logs form I2C Master there are printed ACK'a so far. I will perform more tests but it looks promising.

Regards,

Pawel

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