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PSoC 4 MCU

New Contributor II

I am using a 4200, and have a switch on P3.5, with a falling edge interrupt.  That works just great when the chip is awake.  But when I put it into deep sleep, the interrupt never happens and the chip never wakes up.  I'm stopping the ILO before deep sleep, and restarting the ILO on wakeup (which never happens).  The IRQ should restart the IMO, and state should be retained.  I have saved the state of PWMs and other UDBs, but even without any other configuration besides the single GPIO pin with the switch, it doesn't work.

   

Since it's deep sleep and all the clock are off, I am using transparent mode on an input pin configured as resistive pull-up, and with the input buffer enabled.  I have also tried single-sync with input buffering.

   

Here's some code (I didn't include the obvious code to register the ISR, etc.) the ISR works fine when not in deep sleep.

   

 
CySysClkIloStop();   // turn off the ILO
CySysPmDeepSleep();  // go to DEEP sleep
CySysClkIloStart();  // turn the ILO on again   (after the GPIO IRQ returns we should be here)

   

 

   

CY_ISR(ISR_SW_PWR_Handler)
{
   SW_PWR_ClearInterrupt();
    return;
}
 

   


 

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Esteemed Contributor II

There is a note in the Pins-component datasheet telling

   

If the Pin Interrupt is used to wake the part up from sleep or hibernate low-power mode, the Interrupt component connected to the Pins irq terminal may not have InterruptType set to "RISING_EDGE."

   

 

   

This will probably explain why the interrupt is behaving as you told.

   

 

   

Bob

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Esteemed Contributor

For stop mode -

   

 

   

 

   

 

   

 

   

 

   

http://www.cypress.com/?rID=38267     AN54460 - PSoC® 3, PSoC 4, and PSoC 5LP Interrupts

   

http://www.cypress.com/?rID=95069     AN90799 - PSoC® 4 Interrupts

   

 

   

    

   

          

   

http://www.cypress.com/?rID=93401     AN86439 - PSoC® 4 - Using GPIO Pins

   

 

   

    

   

          

   

http://www.cypress.com/?rID=78797     AN86233 - PSoC® 4 Low-Power Modes and Power Reduction Techniques

   

http://www.cypress.com/?rID=96072     AN90114 - PSoC® 4000 Family Low-Power System Design Techniques

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New Contributor II

Thanks for trying to help, but evidently there's a misunderstanding.  Please read my post again:

   

Deep Sleep != Stop

   

IRQ on FALLING edge

   

 

   

The same method is working on the CY8CKIT-042, but not the target with the same PSoC and I am totally baffled

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Esteemed Contributor II

The datasheet does not talk about the irq, it talkes about the isr that is attached to the irq-signal. The isr must be configured as falling edge.

   

 

   

Bob

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New Contributor II

It is and has been configured for falling edge.  Please pardon my preference for hardware-oriented terminology.  The edge is determined by hardware confguration.  ISR refers to software.

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New Contributor II

So it's working now: The solution was to NOT disable the ILO on the target board.  This same code was working on CY8CKIT-042, but why?  I wonder if the bootoader code on that board locks a WDT so that the ILO cannot be disabled.

   

Does anyone know?

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