Confusion regarding parallel in/out configuration of shift register component.

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cross mob
Anonymous
Not applicable

I should start of by saying it is straightforward to me how to implement the required SR in Verilog-- but I like (even prefer) the DMA access readily provided by the built in component and only am rather a bit confused about the components configuration.

   

Granted the component allows a bit 'width' to be specified, but both inputs and outputs consist of a single terminal, with no indication that they are (or how to create one). For example if I wanted to do a parallel shift in coming from physical pins 0-7 say, with an 8 bit serial out... How does one go about attaching the eight pins to the input ? Is this possible ? Or am I misunderstanding the design/use case of this component ?

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Bob_Marlowe
Level 10
Level 10
First like given 50 questions asked 10 questions asked

There are no parallel inputs or outputs to the shift register component. When you need such a capability you will need to use verilog and diys.

   

 

   

Bob

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