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PSoC 4 MCU

Len_CONSULTRON
Honored Contributor II

Can a Cy8C4013SXI-410 be programmed with a KitProg?

This is a S08 packaged part with NO XRST pin.

Len
"Engineering is an Art. The Art of Compromise."
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BiBi_1928986
Contributor II

Hi Len.

Yes, I program that exact device with Kitprog from KIT-059.  It can be programmed from Creator or, from PSoC Programmer.  I've done both methods. 
https://community.cypress.com/message/209034#209034

And since there's usually not much external circuitry connected to the SO-8 PSoC, you can simply connect Kitprog XRES signal directly to PSoC Vdd.  If you have lots of external circuitry, then you might need the buffers as I show.

BTW, I've also programmed 4245 on KIT-049-4200 and 5LP on KIT-059, without using the PSoC XRES pin.  It works great for putting Bootloaders on blank (or corrupted) devices.

Bill

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Len_CONSULTRON
Honored Contributor II

Bill,

Thanks.  I had a quick look at your link.  There's a lot to digest.

I'll provide feedback as I check it out.

It's funny that the MiniProg3 has "Power Cycling" but not any of the KitProgs (1, 2 or 3).

Len
"Engineering is an Art. The Art of Compromise."
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BiBi_1928986
Contributor II

Hi Len.

Here's several FYI's on programming PSoC 40xx without XRES pin.  It took me many-many-many months to figure out what was going wrong.

Power Cycle programming PSoC 40xx with Miniprog4 doesn't work.  There's a timing bug when trying to acquire the PSoC.  User's revert to using Miniprog4 XRES output to drive target PSoC Vdd.
Solved: Re: MiniProg4 Power Toggle not able to program Cy8... - Cypress Developer Community

The following is a looooooong thread discussing how to program PSoC 40xx when SWD pins are programmed for alternate GPIO usage.
Solved: CY8C4014SXI-420 only able to succesfully program o... - Cypress Developer Community
It boils down to: any programmer that implements CMSIS-DAP, can not program PSoC's without XRES pin.  The thread is so long, it has "Load More" at bottom screen.  But, well worth a read.  Kitprog1 (from KIT-059, KIT-042) is the only programmer that works.

Kitprog1 does not implement CMSIS-DAP protocol.  All other Cypress programmers do implement CMSIS-DAP, hence don't work.  This is not a fault of the programmer, it's the protocol that does not permit SWD alternate GPIO use.  This is detailed in PSoC Programmer 3.29 Release notes:
PSoC® Programmer Release Notes (cypress.com)
Here's the quick summary:
When using standard CMSIS-DAP programmer/debugger, the device flash should be erased or contain an application that has SWD or JTAG selected in PSoC Creator ('Debug Select' option in System Tab). When GPIO is selected in this option, debug pins are disabled in start-up code of user application. PSoC Programmer or 3rd party tools then cannot access the device.

And yes, when using SWD alternate GPIO feature, Kitprog2/3 and Miniprog3/4, can program PSoC 40xx without XRES pin, when target device is blank.  In other words, target PSoC can be programmed for the very first time.  After that, no, they can't.  Only Kitprog1 can program future loads.

I've used dozens of the PSoC SO-8 and SO-16 package, without XRES pin.  I hope you'll also be successful with your project and won't need to go through the reverse engineering phases I had to plow through.

And, thank you for your fantastic contributions to the community.  I've learned a lot from your posts.

Bill.

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Len_CONSULTRON
Honored Contributor II

Bill,

I've tried to digest much of the observations you have provided.   Your efforts required many hours of debugging in sparsely documented modes of operation.

I still need to further understand the gravity of your experiments.  However I have some of my own observations:

Preconditions

PSoC being used:  CY8C4013SXI-410.  No XRES pin.

KitProg being used:  KitProg board detached from a CY8CKIT-059 board.

RESET pin on the KitProg is left open.

VTARG on KitProg connected directly to CY8C4013SXI-410 with 1.0uF Bypass caps.

 

Observations:

KitProg in Standard KitProg mode (ie. LED3 Solid ON).

I chose "Select target and program ..." and the "the KitProg to the PSoC4 in standard Kitprog programming mode.

I can get the KitProg to show up.  In the beginning I also received below in the tree that it can see a CM0 CPU but cannot acquire it fully.

Len_CONSULTRON_0-1617805363830.png

In this mode I could NOT perform any programming or debugging.

 

KitProg in Mass Storage mode [CMSIS DAP] (ie. LED3 Blinking).

If I press the RESET switch on the KitProg board for 5 seconds, I switch the KitProg into Mass Storage mode (CMSIS DAP).  Additionally, I can now see the PsoC4 target WITHOUT a XRES.   I can acquire the PSoC4 target AND program it.

 

Len_CONSULTRON_3-1617805745856.png

I can now program the PSoC4 target successfully.

(How dat?   Confused)

 

Return KitProg to Standard KitProg mode (ie. LED3 Solid ON).

I hold the RESET switch on the KitProg for 5 seconds, it returns back to standard KitProg mode.  However, I can now the PSoC4 target CPU.   I can acquire it without programming.

If I try to program it, the error message comes up that it cannot perform an "EraseAll".

Len_CONSULTRON_1-1617805557327.png

 

More Observations

I went back to CMSIS DAP mode and performed an EraseAll from the PSoC Programmer app.

I can still program it successfully from PSoC Programmer or PSoC Creator.

(Go figure!)

 

Summary

Once I got it working with the KitProg from the CY8CKIT-059 in CMSIS DAP mode, I can program AND DEBUG the PSoC4 target (as long as it remains in the CMSIS DAP mode) with no XRES pin and the RESET pin on the KitProg is left open.

 

Lastly

Thank you also for your forum contributions.

As it can be seen in this elegant but complex processor line, subtle nuisances of user operation can be confusing and not commonly seen.   Our assistance to the community can hopefully help others quickly solve issues.

I do wish that the forum search function was more helpful in finding your 2019 work on this issue.  This might have avoided the need for me to post this thread.

Len
"Engineering is an Art. The Art of Compromise."
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BiBi_1928986
Contributor II

Hi Len.

Well, you've got me scratching my head in bewilderment!

I never tried Kitprog Mass Storage Programmer mode to program PSoC 40xx because Kitprog documentation says it only works with KIT-044 since it uses KIT-044 F-RAM to temp store the .hex file.

How did this Kitprog mode acquire the PSoC?
For Mass Storage Programming mode, it must be using "Step 1B – Acquire Chip (Alternate Method)" as shown in CY8C4xxx, CYBLxxxx Programming Specifications.  This only requires SWD clock and data pins.  XRES pin is not required. Vdd does not need to be toggled.  And, the target PSoC can be acquired any time after power-on using this method.

That said, Mass Storage Programming mode does not support SWD alternate GPIO feature.  And that makes perfect sense.  After PSoC is programmed with alternate GPIO function (in place of SWD function), no amount of pin toggling will acquire the PSoC (using Mass S. P.).

What I don't understand is, why it worked without the use of F-RAM?
Well, maybe Kitprog manual is wrong.  Clearly, it is wrong!

The reason I mentioned the SWD/GPIO feature is, you (or your customer) would likely want to use all GPIO's available on SO-8 package.  I know I did.  And that's what led me down this long road of discovery.

And there you go..., you taught me something new again.  Thank you.

Bill.

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Len_CONSULTRON
Honored Contributor II

Bill,

You are correct:

... Mass Storage Programming mode does not support SWD alternate GPIO feature.  And that makes perfect sense.  After PSoC is programmed with alternate GPIO function (in place of SWD function), no amount of pin toggling will acquire the PSoC (using Mass S. P.).

...

The reason I mentioned the SWD/GPIO feature is, you (or your customer) would likely want to use all GPIO's available on SO-8 package.  I know I did.  And that's what led me down this long road of discovery.


My design doesn't use the SWDIO or SWDCLK pins as GPIO.  Therefore the Mass Storage programming mode is working.

As a test, I switched the "Debug Select" from "SWD" to "GPIO".  (This in itself did not change anything in the PSoC4 part.)   I then reprogrammed the PSoC4.  (This changed the debugging use of the SWDIO and SWDCLK pins.)

I could no longer acquire the PSoC4 whether the KitProg was in Mass Storage mode (CMSIS DAP) or standard programming mode.

I changed the "Debug Select" back to "SWD".   However I couldn't acquire the part to reprogram it.

I am working on circuit changes based on your recommendations.  Updates to follow.

Summary

If the designer can avoid using the pins used for SWDIO and SWDCLK for GPIO, then there is "No" issue when using the KitProg in Mass Storage mode (CMSIS DAP).

The CY8C4013SXI part only have 5 pins for IO.   This could be an issue for many.

Len
"Engineering is an Art. The Art of Compromise."
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Marshal_Zhang
New Contributor II

Kitprog can only be program in RESETmode. 

And CY8C4013SXI-410 does not have XRES.

Therefore, only the Power Cycle mode can be used.

So Kitprog cannot program chips without XRES pins, including CY8C4013SXI-410 .

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BiBi_1928986
Contributor II

Hello Marshal.

You are correct, Kitprog can only program using RESET mode method using Creator or PSoC Programmer software.
However, Kitprog can program CY8C4013SXI-410.  This is done using RESET mode or using Kitprog in Mass Storage Programming mode (as Len discovered).  Cypress software doesn't support Kitprog using Power Cycle method, but that's okay.  Simply connect Kitprog XRES signal to target PSoC Vdd and program target with RESET mode.  Depending on external PSoC circuitry, you may need to buffer Kitprog XRES signal (as shown in weblinks above).  When using Mass Storage Programming method, only SWD CLK and SWD Data signals are used.  XRES is not needed.
Read the entire thread above, you'll find weblinks describing how it's done.

regards.

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