This was the original problem I started with, CYBLE-012011 Hibernate and Stop modes
It was pointed out the UNFREEZEIO(); was not the first program line, that is now corrected.
int main(void)
{
// wake up from stop un freeze gpio
CySysPmUnfreezeIo();
// ensure not used IO are set to analog Hiz
LP_temp_1_SetDriveMode(LP_temp_1_DM_ALG_HIZ);
LP_temp_2_SetDriveMode(LP_temp_2_DM_ALG_HIZ);
LP_temp_3_SetDriveMode(LP_temp_3_DM_ALG_HIZ);
LP_temp_4_SetDriveMode(LP_temp_4_DM_ALG_HIZ);
LP_temp_5_SetDriveMode(LP_temp_5_DM_ALG_HIZ);
LP_temp_6_SetDriveMode(LP_temp_6_DM_ALG_HIZ);
The below code apparently enters STOP mode, and will wakeup from STOP with a High to Low on P2(2) for about 1 minute, after that the unit fails to reset with the transition on P2(2), only POR and XRES work after that.
//*******************************************************************
// Hiberate by timer, flag, or button set Switch3 to wake up
//*******************************************************************
if (sleepTimer == FALSE || hibernateFlag == TRUE || Off_count >= 3)
{
isr_All_SW_Disable();
DBG_PRINTF("\n\rEnterng Hibernate mode -> Sleep %i, Flag %d, Count %d\r\n", sleepTimer,hibernateFlag,Off_control);
CyBle_GapDisconnect(connHandle.bdHandle);
CyBle_ProcessEvents();
DBG_PRINT_TEXT("\n\r Disconnected from any devices\r\n");
while(CyBle_GattGetBusyStatus() == CYBLE_STACK_STATE_BUSY);
CyBle_Stop();
CyDelay(50);
DBG_PRINT_TEXT("\n\r BLE Stack stopped\r\n");
WDT_Stop();
DBG_PRINT_TEXT("\n\r WDT stopped\r\n");
Wakeup_Wakeup();
DBG_PRINT_TEXT("\n\r Enable Wakeup Pin \r\n");
PWM_WriteCompare(0xffff);
DBG_PRINT_TEXT("\n\r LED Off\r\n");
Clock_1_Stop();
DBG_PRINT_TEXT("\n\r PWM stopped\r\n");
isr_W_StartEx(Hibernate_isr);
DBG_PRINT_TEXT("\n\r Entering Hibernate final\r\n");
UART_Stop();
UART_GND_SetDriveMode(UART_GND_DM_ALG_HIZ);
CySysPmSetWakeupPolarity(CY_PM_STOP_WAKEUP_ACTIVE_LOW);
CyDelay(1000);
CySysPmStop();
}
Here is the schematic
To recap, within 1 minute of executing the below code, I can reset from STOP with a High to Low on P2(2), after 1 minute the unit will only reset with a POR or XRES. My bundle is attached.
Solved! Go to Solution.
This is fact, for some reason we had selected CMOS1.8V levels, not really understanding what that did, but when we tried to use CYSYSPMSTOP(); it would lock up in about 1 minute, Hibernate did not care.
Warning, ensure that your IO level is correct for STOP mode, not sure of the deeper explanation, but perhaps Cypress can fill in the gap. I good explanation of the IO levels and their effects, which I do not have time to research now.
Herb
My inputs are set as PULL UPS with CMOS 1.8V level, what effect can the level have?
This is fact, for some reason we had selected CMOS1.8V levels, not really understanding what that did, but when we tried to use CYSYSPMSTOP(); it would lock up in about 1 minute, Hibernate did not care.
Warning, ensure that your IO level is correct for STOP mode, not sure of the deeper explanation, but perhaps Cypress can fill in the gap. I good explanation of the IO levels and their effects, which I do not have time to research now.
Herb