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PSoC 4 MCU

zhaox
New Contributor

Hello, 

           The sensor1 is measured 7pf, meet the requirement>5pf.

While I want to increase mode Idac >30 by increasing auto calib%, but result is reverse as I imagined.

What's the reason?

Is there any self touch tuning guide theory  I can refer? 

 

 

Auto calib20 30 40 50.pngAuto calib60 70 80.png

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1 Solution
Hari
Moderator
Moderator

Hi @zhaox 

 

The equation for raw counts for self cap is 

Hari_0-1630494858687.png

 

 

The equation for raw counts is inversely proportional to the IDAC. Therefore, if you increase the calibration percent, the IDAC code will reduce (since all other parameters are kept constant). 

 

Note that it is also recommended to keep the calibration percent greater than 85% for self-cap sensors. 

 

One way to increase the IDAC would be to increase the sense clock frequency. Since we only have 7pF of Cp and assuming 2k as the series resistance, that would still let us set the Fsw > 6MHz (7Mhz but 6MHz is the achievable limit). Can you try this and let us know if the IDAC codes increase?

 

Best regards, 
Hari

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5 Replies
Hari
Moderator
Moderator

Hi @zhaox 

 

The equation for raw counts for self cap is 

Hari_0-1630494858687.png

 

 

The equation for raw counts is inversely proportional to the IDAC. Therefore, if you increase the calibration percent, the IDAC code will reduce (since all other parameters are kept constant). 

 

Note that it is also recommended to keep the calibration percent greater than 85% for self-cap sensors. 

 

One way to increase the IDAC would be to increase the sense clock frequency. Since we only have 7pF of Cp and assuming 2k as the series resistance, that would still let us set the Fsw > 6MHz (7Mhz but 6MHz is the achievable limit). Can you try this and let us know if the IDAC codes increase?

 

Best regards, 
Hari

View solution in original post

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zhaox
New Contributor

Hello Hari,

          to keep the calibration percent NOT greater than 85% for self-cap sensors, correct?

In my design, 560 ohm in series. Here is the test result by change FW, it is not linear, you can see 48M/20 can get higher Idac.

FW change1.pngFW change2.png

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Hari
Moderator
Moderator

Hello @zhaox 

 

For self-cap, we recommend 85% as the default calibration percent. It is for a mutual cap that we recommend 40%. You can set the calibration percent to 85% and if you observe the raw counts saturating (maybe due to temperature variation or humidity changes) then you can reduce the calibration percent. 

 

Can you please confirm if the set of 7 sensors are the same hardware sensors and if it is duplicated 7 times? Or are they separate sensors? 

Note that when we reduce the divider, the sense clock frequency increases, and therefore the IDAC code would increase to maintain the same ratio. 

It must also be noted that we have a 10% error margin. So for small changes in the sense clock frequency, the IDAC code might not change drastically as the raw counts would still be calibrated correctly. 

 

Best regards, 
Hari

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zhaox
New Contributor

Hello Hari,

            they 7 separate sensors.

Former I started with 85% autocalib, but the issue is as you mentioned_raw counts saturating at room temperature, and very bad charging and discharging waveform.

Then I tuned and shared with you is the latest one, checked waveform_charging and discharging OK.

The delta with 8mm standard finger is within 300.

My questions is_ when we reduce the divider, the sense clock frequency increases, and therefore the IDAC code would increase seems not true, what else behind?

Do you think I can do DVP&R test with current Fsw 48M/24 parameters or need change to 48M/20

Thanks!

 

 

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Hari
Moderator
Moderator

Hi @zhaox 

 

Is there any method to check the IDAC gain parameter? The gain index might be changing when the sense clock frequency is modified, causing the IDAC to remain the same. 

 

An IDAC value greater than 20 is good for CSD sensing, so if this can be achieved, then we can proceed with the testing.

 

Best regards, 
Hari

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