Behavior GPIO state during POR of PSoC4000S

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YoIs_1298666
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Hello,

Please tell me the behavior state of GPIO pin during POR  of PSoC4000S.

if the VDD passes over  "Power On Reset" voltage, the state of GPIO pin follows GPIO configuration.

if the VDD is under  "Power On Reset" voltage, how is the state of GPIO pin?

I think that it is "Analog input" and Hi-Z. Is this correct?

Best regards,

Yocchi

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LinglingG_46
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if the VDD is under  "Power On Reset" voltage, how is the state of GPIO pin?

State: “High Impedance Analog”

pastedImage_0.png

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LinglingG_46
Moderator
Moderator
Moderator
500 solutions authored 1000 replies posted 10 questions asked

if the VDD is under  "Power On Reset" voltage, how is the state of GPIO pin?

State: “High Impedance Analog”

pastedImage_0.png

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Hello,

Thank you very much for your reply.

I could find "high-impedance analog mode" in "AN86439 - PSoC® 4 - Using GPIO Pins" too.

pastedImage_0.png

https://www.cypress.com/documentation/application-notes/an86439-psoc-4-using-gpio-pins

Best regards,

Yocci

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