Nor Flash Forum Discussions
Dear Madam/Sirs,
Please advise if all memory area is completely erased (no data is programmed) when shipped from factory.
If Yes, please confirm if Cypress guarantees it.
This time, customer's target device is S25FS512SDSBHV213.
They are considering programming it in their production line while
they want to omit "erase process" by themselves in order to shorten
production time.
Thank you for your cooperation.
Best regards,
Takuya Hase / Altima, Macnica, Inc.
Show LessHi Cypress
Could you provide the flash relevant data to us? because we refer to the spec., it is only the IC pin dimension on the page91
We can’t know what dimension can meet the pin, and make the best on the soldering, please advise us, Thank you
Cypress number: S29GL512S11TFIV13 -> package: 56-pin TSOP
Show LessI am using nrf52840 to interface with s25FS256 memory. I have been able to get it working in standard SPI mode, read and write works perfectly fine.
I am trying to use Quad I/O mode. I am setting quad bit in CR1V to 1 but i am not setting QPI mode in CR2V as nrf qspi driver does not support QPI mode.
With CR1V quad bit set to 1, the write seems to succeed, but when i read back the contents do not match. I get back mostly F's and D's. Any idea what i might be missing?
Show LessI am using Source code for programming Parallel NOR Flash (S29GL01GS, S29GL512S) in one of my project and I need the source code and driver files and also the header file .
Show LessHi
I'm Purushotham from Dura Automotive Services
Kindly Please fill the table below MPN
MPN | Manufacturer | Life Cycle (Active/Discontinued) | YTEOL | RoHS (Yes/No) | AEC Qualified (Yes/No) | Correct MPN |
S25FS512SDSBFM213 | ||||||
Hi
My page program nd sector erase functions are done . To erase the sectors before page write any rfefrences for calculation for the same.
if it is there It would be helpful. some thing like this ive done is this correct
void spi_flash_secure_region_program (uint16_t address, uint8_t *p_data_bytes, uint16_t size)
{
static uint16_t number_of_pages, size_of_data, last_data_block_size, counter;
int i = 0;
uint16_t startSctrAddr = address & 0x0000FFFF;
uint16_t stopSctrAddr = (address + size) & 0x0000FFFF;
int numSctrs = 1;
if (startSctrAddr != stopSctrAddr) // Data to be written over sector boundary?
numSctrs += 1;
for (i = 0; i < numSctrs; i++)
{
spi_flash_secure_region_erase(startSctrAddr + (i * FLASH_SECURE_REGION_SIZE_4K)); // FLASH_SECURE_REGION_SIZE_4K = 0x400
}
size_of_data = size;
if(size_of_data <= 1024)
{
if (size_of_data % 256)
{
number_of_pages = (size_of_data / 256) + 1;
last_data_block_size = size_of_data % 256;
}
else
{
number_of_pages = (size_of_data / 256);
last_data_block_size = 256;
}
address &= 0x0000FFFF; // address must be aligned to 256 byte !
for ( counter = 0; counter < number_of_pages - 1; counter++ )
{
spi_flash_secure_region_page_program ((address + 256*counter) ,(p_data_bytes +256*counter), 256);
}
// last page
spi_flash_secure_region_page_program ((address + 256*(number_of_pages - 1)) ,(p_data_bytes +256*(number_of_pages - 1)), last_data_block_size);
}
}
void spi_flash_program (uint32_t address, uint8_t *p_data_bytes, uint32_t size)
{
static uint32_t number_of_pages, size_of_data, last_data_block_size, counter;
int i = 0;
uint32_t startSctrAddr = address & 0xff000;
uint32_t stopSctrAddr = (address + size) & 0xff000;
int numSctrs = 1;
if (startSctrAddr != stopSctrAddr) // Data to be written over sector boundary?
numSctrs += 1;
for (i = 0; i < numSctrs; i++)
{
spi_flash_sector_erase(startSctrAddr + (i * FLASH_SCTR_SIZE_4K)); // FLASH_SCTR_SIZE_4K - 0x1000
}
size_of_data = size;
if (size_of_data % 256)
{
number_of_pages = (size_of_data / 256) + 1;
last_data_block_size = size_of_data % 256;
}
else
{
number_of_pages = (size_of_data / 256);
last_data_block_size = 256;
}
address &= 0x00FFFF00; // address must be aligned to 256 byte !
for ( counter = 0; counter < number_of_pages - 1; counter++ )
{
spi_flash_page_program ((address + 256*counter) ,(p_data_bytes +256*counter), 256);
}
// last page
spi_flash_page_program ((address + 256*(number_of_pages - 1)) ,(p_data_bytes +256*(number_of_pages - 1)), last_data_block_size);
}
void spi_flash_sector_erase(uint32_t address)
{
uint8_t status, dummy_var;
uint8_t addr0, addr1, addr2,addr3;
(void)(dummy_var);
addr0 = (uint8_t) (address & 0x000000FF);
addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);
addr2 = (uint8_t) ((address & 0x00FF0000) >> 16);
addr3 = (uint8_t) ((address & 0xFF000000) >> 24);
ALLOW_TRANSFER; // if previous command has set EOQ
PUSH_ENQ(WREN); // write enable command (must be done before every write !!!)
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
ALLOW_TRANSFER; // from this point all following write to PUSHR will be sent
PUSH(SE); // Sector erase command
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var); // discard one RxFIFO item
PUSH(addr3); // most-significant byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
PUSH(addr2); // most-significant byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
PUSH(addr1); // middle byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
PUSH_ENQ(addr0); // least-significant byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
do
{
status = spi_flash_read_status_register();
}
while (status & WIP); // wait here until bulk erase is done
}
void spi_flash_secure_region_erase(uint16_t address)
{
uint8_t status, dummy_var;
uint8_t addr0, addr1, addr2,addr3;
(void)(dummy_var);
addr0 = (uint8_t) (address & 0x000000FF);
addr1 = (uint8_t) ((address & 0x0000FF00) >> 8);
addr2 = 0;
ALLOW_TRANSFER; // if previous command has set EOQ
PUSH_ENQ(WREN); // write enable command (must be done before every write !!!)
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
ALLOW_TRANSFER; // from this point all following write to PUSHR will be sent
PUSH(SECRE); // Secured region erase command
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var); // discard one RxFIFO item
PUSH(addr2); // most-significant byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
PUSH(addr1); // middle byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
PUSH_ENQ(addr0); // least-significant byte of address
WAIT_UNTIL_RxFIFO_IS_NOT_EMPTY;
POP(dummy_var);
do
{
status = spi_flash_read_status_register();
}
while (status & WIP); // wait here until sector erase is done
}
Show Less
What is the maximum junction temperature for S25FL512SAGMFV010?
I have 2 questions about programming OTP bits of non-volatile legacy registers of the S25FS512S device: 1) What happens to the volatile counterpart of such an OTP bit, if the OTP bit was already programmed once (i.e. the OTP bit cannot be programmed again) - would the volatile counterpart of this bit be updated anyway? Or would the volatile bit only be updated, if the OTP can still be updated? 2) Does (re-)programming an OTP bit with its default value count as "once programmed" though the default value hasn't changed?
Show LessThe datasheet for S25FL064L indicates that the S25FL064LABNFI043 option (USON) has an exposed center slug pad. Neither the connectivity diagrams nor signal descriptions indicate the presence or connectivity of this center slug pad, but the notes for the pad (002-12878 Rev. *F pp 138) suggest that this pad is to be used for heat sink purposes.
Is this pad NC, DNU, or is there an expected connection (eg. ground)?
Show Less