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Nor Flash

ViC_3886151
New Contributor II

Hello everyone.

I'm using S25FL127S serial NOR flash with PSoC 5LP MCU. I've been able to establish communication between the two.

I'm using the flash to write data which sometimes can be greater than the page length. When I try to read the same data, some part of it returns 0xFF which probably indicates that the address has reached its page limit. Is it possible to jump between the pages while writing & reading the data?

Please help, its urgent. Thanks in advance

Regards,

Vinay

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24 Replies
SudheeshK
Moderator
Moderator

Hi Vinay,

You cannot program more than 1 page of data in a page program operation. Please see the below paragraph from the datasheet.

"If more than a page of data is sent to the device, the data loading sequence will wrap from the last byte in the page to the zero byte location of the same page and begin overwriting data previously loaded in the page. The last page worth of data (either 256 or 512 bytes) is programmed in the page. This is a result of the device being equipped with a page program buffer that is only page size in length. If less than a page of data is sent to the device, these data bytes will be programmed in sequence, starting at the provided address within the page, without having any affect on the other bytes of the same page."

If you need to program more than 1 page of data, it is recommended to split it into multiple page program operations.

But, page read operation does not look for page boundary. Please see the below information form datasheet.

"The address can start at any byte location of the memory array. The address is automatically incremented to the next higher address in sequential order after each byte of data is shifted out. The entire memory can therefore be read out with one single read instruction and address 000000h provided. When the highest address is reached, the address counter will wrap around and roll back to 000000h, allowing the read sequence to be continued indefinitely."

You can read the entire flash memory with a single READ command.

Thanks and Regards,

Sudheesh

ViC_3886151
New Contributor II

Hello Sudheesh,

Thank you for your reply. I did what you said and you're right.

I'm having another issue. The flash has been showing inconsistency for write enable & data write operations.

Sometimes write enable happens immediately, sometimes it takes more clock cycles & sometimes it keeps running &

does not get completed at all. I even changed the clock frequency & SPI mode (0 & 3) but its of no help.

What might be the issue? Please help.

Thanks & Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

Could you clarify the below sentence?

"sometimes it takes more clock cycles & sometimes it keeps running &

does not get completed at all".

Please make sure that the device is not busy before sending a WREN command.

Could you please attach SPI waveform showing this new issue?

Thank and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

Thanks for the reply.

I am issuing the write enable command as shown below after ensuring dev_not_busy.

slld_WRENCmd();

while(1)

{

     CyDelay(250);

     if(!(read_SR() & 1))

     {

           break;

     }

}

I keep polling the Status Register for not busy.

I do the same kind of polling for slld_PPCmd() for write operation too.

Sometimes the operation is completed when SR value is checked twice or thrice. Sometimes SR is checked nearly 10 to 15 times.

Any specific reason for this type of behaviour?

Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

1. Are you observing this issue on a new device? Or, are you testing an older device?

2. In the previous response you said that,

"sometimes it takes more clock cycles & sometimes it keeps running &

does not get completed at all".

Do you see any of the error bits get set in status register when this issue happens?

Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

I've been using this device for almost a month now.

Please refer the attached images. As you can see, there is no telling about the time taken for write enable & device not busy to happen correctly. It also happens when writing the data to the flash.

Thanks & Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

I could not understand the log messages that you attached with your previous response. Can you attach your code to access our flash device? It will help us to understand more about the issue? Also, can you attach SPI waveform for flash operations when this issue happens?

Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

Sorry for the late reply as I was busy.

I have attached the code here. Please have a look at it.

The images I attached previously were the debug messages wherein I polled continuously for not busy condition from Status Register.

"Also, can you attach SPI waveform for flash operations when this issue happens?" -- There is no way of determining when this issue happens.

Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

I checked your code and it looks OK.

Do you see the following issue "sometimes it takes more clock cycles & sometimes it keeps running & does not get completed at all" after both PP and WREN command? Or, this is observed only after PP command? What is the value of status register when the devices goes busy? Please clarify.


Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

This issue is observed both in WREN and PP command.

For WREN command

When polling for not busy condition in Status Register, I get ÿ [which is 0xFF] and at the end I get STX [which is 0x02] indicating write enable has been done and the flash is not busy.

For PP command

When polling for not busy condition in Status Register, I get ÿ [which is 0xFF] and at the end I get NULL [which is 0x00] indicating write operation is done and the flash is not busy.

Thanks and Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

As per your previous response, the flash return to "NOT BUSY" state after both WREN and PP commands. Bur, earlier you mentioned that the check for "NOT BUSY" state does not get completed at all.

"sometimes it takes more clock cycles & sometimes it keeps running & does not get completed at all"

Are you able to read correct data flash from flash after program operation?

Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

"& does not get completed at all"

I'm not facing this issue right now.

"Are you able to read correct data flash from flash after program operation?"

After issuing PPCmd & waiting for NOT BUSY condition, the data can be read correctly from the flash.

The data I write is nearly 220-250 bytes. But the problem is waiting for not busy which causes indefinite duration of polling of SR.

The images I attached in one of my previous responses [WREN debug msg] illustrates this.

Thanks & Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

Based on your previous response, you are able to program data to the flash and read them correctly back from the flash without any issue.

When do you face the problem of "indefinite polling or SR" happens? Does this issue rarely happen? Please clarify.

Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

There seems to be no way to determine when this issue pops up. Please take a look at the images attached along with this message. I took these screenshots today. As you can see, the occurrence of this behaviour is random. What is the reason for this kind of behaviour?

Thanks & Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hi Vinay,

Can you please let me know the number of devices showing this behavior and clock frequency that you use to access flash device?

Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hi Sudheesh,

This is the second device I'm using. Even the first one showed the same behaviour.

Clock type --> Internal

Frequency --> 680kHz

Bit rate --> 340kbps

SPI mode --> 0

Thanks & Regards,

Vinay

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BacemD_61
Employee

Hi Vinay,

You need to send the Write Enable command prior to every slld_PPCmd() call to program data.

Could you please output the SR value on every SR read on the debug messages and send us the logs for review?

To properly poll for operation completion, you can implement a similar function to slld_StatusGet() which you have included in your code as well. This will make sure to check for program and erase errors as well.

Best regards,

Bacem

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ViC_3886151
New Contributor II

Hi Bacem,

I am sending WREN everytime before PPCmd is called.

Please refer the attached images. Images 1,2,3 are for write enable. Images z1,z2,z3 are for write enable followed by PPCmd.

Thanks & Regards,

Vinay

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BacemD_61
Employee

Hello Vinay,

This is not normal to read SR as 0, then 0xFF then 0x2.

After sending the WREN command, you should immediately read the SR as 0x2.

Please capture the logic analyzer traces on the flash signals and share them for review. There is definitely something wrong in the commands that the flash is receiving.

Best regards,

Bacem

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ViC_3886151
New Contributor II

Hi Bacem,

Sorry for the late reply. The issue seems to have solved for the moment. Previously I configured SPI component to use internal clock at 340 bits per second [Frequency = 680kHz]. Now I have changed the SPI configuration to use external clock at frequency 12MHz. So, after I pass WREN command, while polling for not busy condition, I read the SR as 0x00 and then as 0x02. Similarly, for PPCmd, I read SR as 0x03 once or twice and then 0x00. I'm not coming across 0xFF as of now for both the commands.

But you said that SR should be read as 0x02 immediately. But I'm reading 0x00 and then 0x02. Is there any way to achieve that?

Regards,

Vinay

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BacemD_61
Employee

Hi Vinay,

Please capture the logic analyzer traces on the flash signals and share them for review. There is definitely something wrong in the commands that the flash is receiving.

I suspect that the first read is taking place before the flash receives the WREN command.

Best regards,

Bacem

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ViC_3886151
New Contributor II

Hi Bacem,

You were right. While debugging, I found that I was reading SR even before sending WREN command. Now I get SR=0x02 as soon as WREN command is sent.

When SE command is sent after WREN command, the polling takes a little time reading SR=0x03. Is it normal as it is a sector erase operation?

Thanks & Regards,

Vinay

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SudheeshK
Moderator
Moderator

Hello Vinay,

Your observation is normal. You won't see SR=0x00 immediately after SE command. Flash will be busy for a duration (SR = 0x03) for which the internal erase takes place, then it will become SR = 0x00.

Thanks and Regards,

Sudheesh

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ViC_3886151
New Contributor II

Hello Sudheesh,

Thanks for the confirmation.

Thanks & Regards,

Vinay

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