Hi there,
I'm currently using s29jl064h and s29jl064j's simulation models in my work.
Both models were provided by Cypress official technical support on this forum, urls are:
Can I use S29JL064J's Verilog simulation model for S29JL064H ?
S29jl064j simulation model compile error.
Models are run with timing checks enabled and it reports no timing errors.
In Chip Erase simulation, I send in command series according to the datasheets, and give all operations sufficient timing margin,
but both models have similar "out of bounds" Warning info.
For 064h, <s29jl064h.v> at lines near here:
if (i!=VarSect1 && i!=VarSect2)
begin
if (~Sec_Prot)
BankEraseExec = 1'b1;
end
At the BankEraseExec assignment line, simulator issues Warnings like:
# ** Warning: (vsim-8233) ../../simulation_model/S29jl064h/model/s29jl064h.v(2999): Index 4 into array dimension [3:0] is out of bounds.
# ** Warning: (vsim-8233) ../../simulation_model/S29jl064h/model/s29jl064h.v(2999): Index 5 into array dimension [3:0] is out of bounds.
# ** Warning: (vsim-8233) ../../simulation_model/S29jl064h/model/s29jl064h.v(2999): Index 6 into array dimension [3:0] is out of bounds.
# ** Warning: (vsim-8233) ../../simulation_model/S29jl064h/model/s29jl064h.v(2999): Index 7 into array dimension [3:0] is out of bounds.
# ** Warning: (vsim-8233) ../../simulation_model/S29jl064h/model/s29jl064h.v(2999): Index 8 into array dimension [3:0] is out of bounds.
# ** Warning: (vsim-8233) ../../simulation_model/S29jl064h/model/s29jl064h.v(2999): Index 9 into array dimension [3:0] is out of bounds.
......
For 064j, similarly, at line "BankEraseExec = 1'b1;" assignment, simulator repeatedly throws Warning info:
Index 4 into array dimension [3:0] is out of bounds.
Index 5 into array dimension [3:0] is out of bounds.
......
Index 127 into array dimension [7:0] is out of bounds.
besides, at following location:
if (~SubSec_Prot2 && DYB_SubSec2 == 0
&& PPB_SubSec2 == 0)
BankEraseExec[0] = 1'b1;
Simulator repetitively throws Warning info:
Index 127 into array dimension [7:0] is out of bounds.
In both models, "BankEraseExec" is a 4-bit vector, and in simulation the "i" does seem to be larger than 4.
So, can anyone help me with this?
Is it a simulation model bug, or my design bug?
