S25FL256SAGNFV00

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CHYa_4005411
Level 1
Level 1

Hi

  I have a S25FL256SAGNFV. The content I read from the memory is H.But I can not program.

  I have read the status register. SR1=1Eh. The memory is in Block Protection state.I tried to write the status register bit,but it didn't work.How to sovle this problem.

thank you.

CHANG

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1 Solution

Hi Chang,

Can you check for the CR1 value on the failed chip. Is the OTP bits in CR1 are all set to 1 which caused the BPNV=1 and the BP2-0 was default set to 1 to protect the entire chip.

If so, it is related with some sudden power drop during non-volatile CR/SR configuration with WRR command, form more information, please find the following KBA and AN:

https://community.cypress.com/docs/DOC-13833

https://www.cypress.com/documentation/application-notes/an200381-best-practice-wrr-command-spi-devic...

About the register cannot be changed, will it still unchangeable after POR or reset the flash chip? Or the BP0-2 bits just become volatile and set to 111b again after reset which just like unchangeable?

If the OTP bits (especially BPNV bit) in CR1 was set to 1 unexpectedly, there is no way to make it back to 0 again.

Thanks,

Pradipta.

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3 Replies
PradiptaB_11
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

Hi Chang,

The devices when provided from Cypress have a 0 in the Block Protect register bit. Can you tell us if the Block protection bits are volatile or non-volatile. You can check the BENV bit in the configuration register for this. After providing the WREN opcode are you using the WRR command to change the SR1 value. Since the program_error bit is 0 which indicates that there is no error internally in the device. How many devices are showing this behavior ?

Are you able to read the device ID properly ?

Also are you powering up/down the device according to the datasheet configurations ?  This can also lead to this failure.

Thanks,

Pradipta.

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Hi Pradipta

The Block protection bits are volatile.

The device ID can be read correctly,just as shown in the datasheet.

I used the WHEN, WRR opcode to change the SR1[4:2] value, and it worked once. But now,I can't erase the contents. The WRR command is failed,with the program_error bit showing 1.And the erase command also failed. This is one of the four devices showing this behavior.

Thanks,

Chang

0 Likes

Hi Chang,

Can you check for the CR1 value on the failed chip. Is the OTP bits in CR1 are all set to 1 which caused the BPNV=1 and the BP2-0 was default set to 1 to protect the entire chip.

If so, it is related with some sudden power drop during non-volatile CR/SR configuration with WRR command, form more information, please find the following KBA and AN:

https://community.cypress.com/docs/DOC-13833

https://www.cypress.com/documentation/application-notes/an200381-best-practice-wrr-command-spi-devic...

About the register cannot be changed, will it still unchangeable after POR or reset the flash chip? Or the BP0-2 bits just become volatile and set to 111b again after reset which just like unchangeable?

If the OTP bits (especially BPNV bit) in CR1 was set to 1 unexpectedly, there is no way to make it back to 0 again.

Thanks,

Pradipta.

0 Likes