S25F064L write speed, current and interface

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MoPr_4537651
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I was looking at the available options for external flash memory from Cypress. I found the serial NOR flash most suitable for my application. I was going through the datasheet of S25F064L and I had a few doubts.

In the performance summary page (shown below), the read operations have their speed and current consumption dependent on the clock frequency. However, the same information for the program/write and erase operations are not provided. They have just mentioned a typical program and erase speeds and a typical current consumption of 17mA. How is it that these are not dependent on clock frequency?

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I stumbled upon this project https://www.cypress.com/documentation/code-examples/interfacing-quad-spi-memory-psoc-5lp when I was searching for ways to interface QSPI memory modules with PSoC 5LP. In that project it says that the max clock frequency is 5MHz. What would be the maximum read and write speeds achievable with this QSPI module. In the datasheet of S25F064L it says the minimum clock frequency is DC. So I am guessing a clock frequency of 5MHz should still be fine. How do I estimate the power consumption and speed for read, write and erase operations when using a clock frequency of 5MHz?

Earlier, I was using a SD card with my PSoC 5LP device and NSDSPI module to talk to the SD card. The main for this was to achieve higher read/write speeds while emulating a file system. Is there some similar implementation to emulate a file system on this series of chips while maintaining the speed? My minimum speed requirement is 200kBps.

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Apurva_S
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100 likes received 500 replies posted 250 solutions authored

Hi,

>>How is it that these are not dependent on clock frequency?

Program/Erase operations are embedded operations that happen internally (inside the flash) and once initiated, don't need any clock input to finish completion. These operations have a typical or maximum time requirement. Where as, in read operation we need a clock input to sample the data. During program operation, the data first gets loaded to a buffer inside the flash, and the actual embedded operation of programming starts only after the CS# line goes HIGH after sending the program command, address and all the data.

>>What would be the maximum read and write speeds achievable with this QSPI module?

The read rate at 5MHz should be roughly 625KBps (This value is not tested and actual value may vary. For exact value I will have to check internally). Regarding programming speed, as already mentioned, it will not depend on clock frequency. While writing a program, the recommended way to check whether a program/erase operation has completed or not is to poll the WIP bit of the Status Register, instead of waiting for a fixed amount of time. If you want to know more details about polling, please do let me know.

>>How do I estimate the power consumption and speed for read, write and erase operations when using a clock frequency of 5MHz?

The DC Characteristics table on page 122 of the datasheet mentions the current consumption of the device for read operation (at different frequencies including 5MHz) and program/erase operations. You can calculate the power consumed by the device depending on the Vcc value of your application.

>>Is there some similar implementation to emulate a file system on this series of chips while maintaining the speed? My minimum speed requirement is 200kBps.

We do provide a Cypress Flash File System, but I guess we don't have any ready data about the exact time taken by read/program/erase operations to complete while FFS is being used. I will have to check internally regarding this.

- Apurva

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Apurva_S
Moderator
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100 likes received 500 replies posted 250 solutions authored

Hi,

>>How is it that these are not dependent on clock frequency?

Program/Erase operations are embedded operations that happen internally (inside the flash) and once initiated, don't need any clock input to finish completion. These operations have a typical or maximum time requirement. Where as, in read operation we need a clock input to sample the data. During program operation, the data first gets loaded to a buffer inside the flash, and the actual embedded operation of programming starts only after the CS# line goes HIGH after sending the program command, address and all the data.

>>What would be the maximum read and write speeds achievable with this QSPI module?

The read rate at 5MHz should be roughly 625KBps (This value is not tested and actual value may vary. For exact value I will have to check internally). Regarding programming speed, as already mentioned, it will not depend on clock frequency. While writing a program, the recommended way to check whether a program/erase operation has completed or not is to poll the WIP bit of the Status Register, instead of waiting for a fixed amount of time. If you want to know more details about polling, please do let me know.

>>How do I estimate the power consumption and speed for read, write and erase operations when using a clock frequency of 5MHz?

The DC Characteristics table on page 122 of the datasheet mentions the current consumption of the device for read operation (at different frequencies including 5MHz) and program/erase operations. You can calculate the power consumed by the device depending on the Vcc value of your application.

>>Is there some similar implementation to emulate a file system on this series of chips while maintaining the speed? My minimum speed requirement is 200kBps.

We do provide a Cypress Flash File System, but I guess we don't have any ready data about the exact time taken by read/program/erase operations to complete while FFS is being used. I will have to check internally regarding this.

- Apurva

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ApurvaS_36 wrote:

Hi,

>>How is it that these are not dependent on clock frequency?

Program/Erase operations are embedded operations that happen internally (inside the flash) and once initiated, don't need any clock input to finish completion. These operations have a typical or maximum time requirement. Where as, in read operation we need a clock input to sample the data. During program operation, the data first gets loaded to a buffer inside the flash, and the actual embedded operation of programming starts only after the CS# line goes HIGH after sending the program command, address and all the data.

Ohh, this is awesome! Thanks for clarifying this.

>>What would be the maximum read and write speeds achievable with this QSPI module?

The read rate at 5MHz should be roughly 625KBps (This value is not tested and actual value may vary. For exact value I will have to check internally). Regarding programming speed, as already mentioned, it will not depend on clock frequency. While writing a program, the recommended way to check whether a program/erase operation has completed or not is to poll the WIP bit of the Status Register, instead of waiting for a fixed amount of time. If you want to know more details about polling, please do let me know.

625KBps speed is good enough for our application.

Until now, we were using a ping pong buffer and writing the data in bursts of 4000 bytes. With the increased speed doing the same shouldn't be a problem. If I run into some sort of trouble I will get back to you.

>>How do I estimate the power consumption and speed for read, write and erase operations when using a clock frequency of 5MHz?

The DC Characteristics table on page 122 of the datasheet mentions the current consumption of the device for read operation (at different frequencies including 5MHz) and program/erase operations. You can calculate the power consumed by the device depending on the Vcc value of your application.

Thank you, will look into that.

>>Is there some similar implementation to emulate a file system on this series of chips while maintaining the speed? My minimum speed requirement is 200kBps.

We do provide a Cypress Flash File System, but I guess we don't have any ready data about the exact time taken by read/program/erase operations to complete while FFS is being used. I will have to check internally regarding this.

This is something that can be run on PSoC 5LP. Like a module that can be imported in the PSoC creator?

- Apurva

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Hi,

>>This is something that can be run on PSoC 5LP. Like a module that can be imported in the PSoC creator?

Yes, it can be included in your PSoC Creator project and can run on PSoC 5LP. If you want access to our FFS, please send a mail on ffs@cypress.com​ with the following information -

Your full name is: < >

Company Name : < >

Company Address/Location : ?????

Your specific company e-mail address : < >

Best contact phone number : ?????

Specific device OPN used with FFS : < >

- Apurva

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Hi,

Thanks a lot. Will send the mail once we get the hardware ready. One last question, what is the full-form of OPN. Do you mean the part number of the exact PSoC 5LP chip that I will be using the FFS on?

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Hi,

OPN stands for Operating Part Number.

Since the FFS distribution is being handled by the Memory team within the organization, please mention the complete part number of the flash device you are planning to use. However, since the SoC you are going to use is also a Cypress product, you can mention that as well.

Regards,

Apurva

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Ohh, ok. Thanks for the quick clarification. Will keep this in mind.

Regards,

Mohan Prabhakar

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I am planning on using the USON-8 package of the 64Mbit flash memory series (S25FL064ABNFI040). I noticed that there is an exposed pad in the package. In the pinout description, there is no information on where to connect the exposed pad. Should I connect it to ground for optimal heat dissipation? Or should it be left unconnected?

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Hi Mohan,

Please see this forum thread of a similar question - S25FL064LABNFI043 Center Slug Pad . Let me know if this answers your question.

Also, I would request you to create a separate thread when the follow up questions are unrelated to the title of the current thread. This will make sure that each thread has only one topic being discussed and has only one correct answer. This way, other community members will not miss out on any important topic being discussed on a thread with a different title.

Regards,

Apurva

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Hello Apurva,

Thanks a lot for that clarification. That clears my doubts.

Yes sorry, my bad. I will do it like you suggested from now on.

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