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Hello,
I was not able to understand the points mentioned in below image. What is that 0/0/32 Latency cycle in Description section in S25HL512T datasheet?..Can you give an solution of correct number of latency cycle for 00 in that register bit.
Regards,
Vijay
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Hi Vijay,
As mentioned in the description, please see Table 51 on page 72 and the notes below it. The last 32 on both are Read Unique ID latency. The latency cycles are for 'fast read registers (no address)/regular read registers (no/with address)/read unique ID register'.
Regards.
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Hi Vijay,
As mentioned in the description, please see Table 51 on page 72 and the notes below it. The last 32 on both are Read Unique ID latency. The latency cycles are for 'fast read registers (no address)/regular read registers (no/with address)/read unique ID register'.
Regards.