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Nor Flash

Shivam
New Contributor II

Hi Team,

In my application, I am using S25FL256SAGMFI000 SPI-based NOR flash chip. I am able to establish the communication with it successfully and able to enable the dynamic protection scheme as well. But, additionally, I am looking forward to understanding the ECC protection for this chip. Is ECC enabled for this chip by default or I need to follow the particular sequence to enable the ECC; I would like to know that sequence if there any.

Also, I am keen to understand that is there any method possible with which we can verify that ECC is detecting the error properly.

Request you to provide me support in understanding this ECC-related question for this chip. Quick support will be appreciated.

Regards,

Shivam

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4 Replies
AlbertB_56
Employee

Hello Shivam,

Thank you for contacting Cypress Semiconductor.

Please allow us to review your findings.  We will communicate any new information to you,

as soon as it becomes available.

 

Best regards,

Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

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AlbertB_56
Employee

Hello Shivam,

Please find attached the URL to the "Automatic ECC for 65-nm MirrorBit® SPI Flash Memory" application note.

 

Best regards,
Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

 

 

 

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AlbertB_56
Employee

Hello Shivam,

Please find attached the URL to the "Automatic ECC for 65-nm MirrorBit® SPI Flash Memory" application note.

       https://www.cypress.com/file/301591/download

 

Best regards,
Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

 

 

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AlbertB_56
Employee

Hello Shivam,

Please find attached the URL to the "Automatic ECC for 65-nm MirrorBit® SPI Flash Memory" application note.

       https://www.cypress.com/file/301591/download

 

Best regards,
Albert

Cypress Semiconductor Corp.

An Infineon Technologies Company

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