Non Volatile RAM (F-RAM & NVSRAM) Forum Discussions
Dear Cypress team.
I am looking for linux driver for this device. Which driver is compatible for this?
I have kernel 4.9.124 and IMX6 platform.
Thank you.
Best regards.
Paul Guillén
Show LessHi,
We would like to confirm for SCL tLOW characteristics of FM24C16B-G.
The datasheet lists the minimum value of tLOW but not the maximum value.
For example, when using 100kbps,
One clock cycle is 10us.
In other words, the high period is 5us and the low period is 5us.
However, does the device work properly even if the low period is 20us in rare cases?
For some reason, the low period of the clock of the I2C master is operating longer.
I understand that this is a problem on the master side, but do you think this FRAM can output data normally even with such a clock?
This device doesn't have a clock stretch function, right?
Regards,
Show LessHi,
We are using "FM25W256-G" in our design.We require power dissipation of this ic under typ,min and max conditions for thermal analysis.Also require "RθJB-Thermal resistance between Junction to Board" which is not available in the datasheet.Kindly help us to get the same asap.
Show Less- AN6023 speaks about a pull-up to VCAP, AN43380 speaks about a pull-up to VCC, so ?
- AN43380 recommendes HSBn configuration with an external pull-up resistor between 5.6 kΩ and 10 kΩ to Vcc.
Our design is with HSBn pulled up to Vcc with 4K7, and interfaced with a single gate 74LVC1G14. Is it correct ?
Show LessBase on Cypress website link as below.
https://www.cypress.com/part/cy15b128q-sxe
The datasheet only show CY15B128Q-SXA
Please help check to provide correct datasheet.
Thanks,
Mitchell
Show LessFinding a replacement for MB85RS128TYPNF-GS-BCERE1 (FRAM), Does any CYPRESS parts suggest to replace it?
When enable / disable Autostore sequence successful, How to check this setting by software or hardware?
Hello CDC,
Product: NVSRAM, CY14E116L-ZS25XI
The NVSRAM fails when power fluctuation occurs several times and the capacitor is not able to provide more energy.
Can you support for the following questions?
- Besides tHRECALL , is there another limitation to use a larger capacitor value?
- Per your data sheet, the STORE cycle duration (tSTORE) is 8ms, what happens if a power fluctuation occurs in the middle of a store cycle?
- Per your data sheet, the Power-UP RECALL duration (tHRECALL) is 30ms, what happens if a power fluctuation occurs in the middle of a power-up recall?
- The aging of the nvSRAM is affected by the power fluctuation?
- Do you consider that increasing the capacitor value is enough to avoid the failures?
Please note that this is sensitive circuit design and is property.
Can I have private chat?
Thank you.
Show LessCY15V104QSN-108SXI目前已经是一个量产的状态,但规格书没找到,能否麻烦提供下,谢谢!
--<質問>*-------------------------------
HOLDピンの接続についてですが、データシートから
今までのHOLDピンはDNCピンとなり、未接続またはVDDへ接続
と書かれております。
ところが、弊社のFM25V20Aシリーズ使用回路の中に、
ICの出力に接続されている回路があり、
電源投入時僅かな時間ですが「L」レベルになることがあります。
こういった回路接続に問題がないか、
御教示頂きたく、宜しくお願い致します。
Show Less