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Non Volatile RAM (F-RAM & NVSRAM)

Anonymous
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        I would like to interface an NVSRAM device to a 32 bit microcontroller data bus. Is it allowed to use two 16-bit CY14B104NA-ZS45XI nvSRAM devices in parallel in order to interface with a 32-bit microprocessor data bus? Is there any design considerations to be followed for this approach?   
   
Thanks in Advance for any help.   
   
Frank   
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Anonymous
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        Hi Frank,   
   
It is acceptable to use two 16 bit nvSRAM devices for memory width expansion by putting them side by side and accessing them together. The control signals (CS#, WE#, OE#) of one of the nvSRAMs should be tied to the control signals (CS#, WE#, OE#) of the other nvSRAM and connected to the controller's CS#, WE# and OE# lines respectively.   
   
It is also recommended to pull up WE# line using a 5.6K ~ 10K pull up resistor.Pulling CS# and OE# lines is not necessary for the nvSRAM design although it is common design practice to pull control signals.   
   
Thanks,   
Pavan   

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Anonymous
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        Hi Frank,   
   
It is acceptable to use two 16 bit nvSRAM devices for memory width expansion by putting them side by side and accessing them together. The control signals (CS#, WE#, OE#) of one of the nvSRAMs should be tied to the control signals (CS#, WE#, OE#) of the other nvSRAM and connected to the controller's CS#, WE# and OE# lines respectively.   
   
It is also recommended to pull up WE# line using a 5.6K ~ 10K pull up resistor.Pulling CS# and OE# lines is not necessary for the nvSRAM design although it is common design practice to pull control signals.   
   
Thanks,   
Pavan   

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