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Non Volatile RAM (F-RAM & NVSRAM)

Anonymous
Not applicable

Hi folks I hope I'm in the right place

I have an FM25V10 and I need to interface it to an ATmega128. There are lots of examples of how to setup the mega128 SPI but I'm not having any luck finding a specific example that uses the FM25V10.

Any help would be much appreciated. Many thanks

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1 Solution
Anonymous
Not applicable

Ok here's how it works. First initialise the mega SPI interface:

// initialise SPI-FRAM interface

void init_SPI (void)

{

     DDRB = ((1 << DDB4) | (1 << DDB2) | (1 << DDB1) | (1 << DDB0)); // bits 4 (WP), 2 (MOSI), 1 (SCK) and 0 (CS) as outputs

     SPCR = ((1 << SPE) | (1 << MSTR) | (1 << CPOL) | (1 << CPHA)); // SPI enable, Master, f/2

     BIT_SET (PORTB, PB0); // CS = 1

     //BIT_SET (PORTB, PB4); // WP = 1 (only required if writing to the Status register)

}

This is straight out of Atmel's documentation. You may need to adapt the DDRB command so it corresponds to your hardware. CPOL and CPHA set the SPI mode but the FM25V10 auto-detects the mode from the status of the SCK pin when CS is low. The BIT_ macros are all over the internet but here they are anyway:

#define BIT_SET(x, y) (x |= BIT (y)) // set bit

#define BIT_RESET(x, y) (x &= ~(BIT (y))) // clear bit

The following routine reads the status register:

unsigned char status_SPI (void)

{

     unsigned char ucRead;

      

     BIT_RESET (PORTB, PB0); // CS = 0

      

     SPDR = 0x05; // put read status register command in buffer...

     while (!(SPSR & (1 << SPIF))); // ...and clock it through

      

     ucRead = SPDR; // unload buffer

     SPDR = 0x00; // dummy write

     while (!(SPSR & (1 << SPIF))); // transfer response...

     ucRead = SPDR; // ...and read it

      

     BIT_SET (PORTB, PB0); // CS = 1

     return ucRead;

}

The important part is ucRead = SPDR followed by SPDR = 0x00. This transfers the response from the FM25V10 to the mega's SPI buffer. The CS must be low for the whole operation.

Writing and reading build on this sequence. Alway use ucRead = SPDR after setting the command and every address byte, and when reading use  SPDR = 0x00

to clock the FM25V10's response into SPDR.

HTH and good luck

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1 Reply
Anonymous
Not applicable

Ok here's how it works. First initialise the mega SPI interface:

// initialise SPI-FRAM interface

void init_SPI (void)

{

     DDRB = ((1 << DDB4) | (1 << DDB2) | (1 << DDB1) | (1 << DDB0)); // bits 4 (WP), 2 (MOSI), 1 (SCK) and 0 (CS) as outputs

     SPCR = ((1 << SPE) | (1 << MSTR) | (1 << CPOL) | (1 << CPHA)); // SPI enable, Master, f/2

     BIT_SET (PORTB, PB0); // CS = 1

     //BIT_SET (PORTB, PB4); // WP = 1 (only required if writing to the Status register)

}

This is straight out of Atmel's documentation. You may need to adapt the DDRB command so it corresponds to your hardware. CPOL and CPHA set the SPI mode but the FM25V10 auto-detects the mode from the status of the SCK pin when CS is low. The BIT_ macros are all over the internet but here they are anyway:

#define BIT_SET(x, y) (x |= BIT (y)) // set bit

#define BIT_RESET(x, y) (x &= ~(BIT (y))) // clear bit

The following routine reads the status register:

unsigned char status_SPI (void)

{

     unsigned char ucRead;

      

     BIT_RESET (PORTB, PB0); // CS = 0

      

     SPDR = 0x05; // put read status register command in buffer...

     while (!(SPSR & (1 << SPIF))); // ...and clock it through

      

     ucRead = SPDR; // unload buffer

     SPDR = 0x00; // dummy write

     while (!(SPSR & (1 << SPIF))); // transfer response...

     ucRead = SPDR; // ...and read it

      

     BIT_SET (PORTB, PB0); // CS = 1

     return ucRead;

}

The important part is ucRead = SPDR followed by SPDR = 0x00. This transfers the response from the FM25V10 to the mega's SPI buffer. The CS must be low for the whole operation.

Writing and reading build on this sequence. Alway use ucRead = SPDR after setting the command and every address byte, and when reading use  SPDR = 0x00

to clock the FM25V10's response into SPDR.

HTH and good luck

View solution in original post

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