我們使用FM24CL64B-GTR于产品应用。
因为之前是有看到富士通的FRAM的datasheet中是有关于ESD和闩锁方面的说明的,因此想了解下CYPRESS的FRAM是否也有这方面的说明,只是未在datasheet中展示,另外FRAM芯片设计中是否又对闩锁问题在半导体层面做加强处理或工艺加强?
如果FRAM因為ESD發生閂鎖,那對存儲在裡面的資料會有什麼影響?
閂鎖後輕的結果或者嚴重的後果會是什麼?
已解决! 转到解答。
Hi Mitchell,
The datasheet for FM24CL64B lists the ESD voltage and latch up current in the datasheet under the maximum ratings section. You can refer to the section for more details. Also you can refer to the below thread to refer to the SEL reliability report for all our FRAM parts.
FRAM CY15B102Q - Technology Size and SER
Regards,
Pradipta
Hi Mitchell,
The datasheet for FM24CL64B lists the ESD voltage and latch up current in the datasheet under the maximum ratings section. You can refer to the section for more details. Also you can refer to the below thread to refer to the SEL reliability report for all our FRAM parts.
FRAM CY15B102Q - Technology Size and SER
Regards,
Pradipta
Hi Pradipta,
We are consider worse case for design.
If FRAM latch-up, have any data will be change?
For example,
1. Partial address can't read/write
2. FRAM can't working
3. When latch-up, after power cycle the functional will become normal, but early data will be loss.
Could you have this kind of test data share?
Regards,
Mitchell
Hi Mitchell,
I do not think we have this data with us. I will check with the team internally again and let you know if such data is available.
Thanks,
Pradipta.